PH

Pouya Hashemi

IBM: 550 patents #15 of 70,183Top 1%
Globalfoundries: 25 patents #110 of 4,424Top 3%
ET Elpis Technologies: 3 patents #8 of 121Top 7%
Samsung: 2 patents #37,631 of 75,807Top 50%
TE Tessera: 1 patents #207 of 271Top 80%
📍 Purchase, NY: #1 of 53 inventorsTop 2%
🗺 New York: #17 of 115,490 inventorsTop 1%
Overall (All Time): #268 of 4,157,543Top 1%
581
Patents All Time

Issued Patents All Time

Showing 326–350 of 581 patents

Patent #TitleCo-InventorsDate
9887197 Structure containing first and second vertically stacked nanosheets having different crystallographic orientations Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2018-02-06
9876015 Tight pitch inverter using vertical transistors Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2018-01-23
9875896 Method for forming a strained semiconductor layer including replacing an etchable material formed under the strained semiconductor layer with a dielectric layer Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2018-01-23
9870953 System on chip material co-integration Takashi Ando, Lukas Czornomaz, Alexander Reznicek 2018-01-16
9871140 Dual strained nanosheet CMOS and methods for fabricating Karthik Balakrishnan, Michael A. Guillorn, Alexander Reznicek 2018-01-16
9865462 Strain relaxed buffer layers with virtually defect free regions Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2018-01-09
9865714 III-V lateral bipolar junction transistor Tak H. Ning, Alexander Reznicek 2018-01-09
9865737 Formation of FinFET junction Kevin K. Chan, Ali Khakifirooz, John A. Ott, Alexander Reznicek 2018-01-09
9865511 Formation of strained fins in a finFET device Ali Khakifirooz, Alexander Reznicek 2018-01-09
9859371 Semiconductor device including a strain relief buffer Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2018-01-02
9859301 Methods for forming hybrid vertical transistors Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2018-01-02
9859367 Stacked strained and strain-relaxed hexagonal nanowires Takashi Ando, John A. Ott, Alexander Reznicek 2018-01-02
9859369 Semiconductor device including nanowire transistors with hybrid channels Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek 2018-01-02
9859420 Tapered vertical FET having III-V channel Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2018-01-02
9859425 Field-effect transistor with aggressively strained fins Ali Khakifirooz, Alexander Reznicek 2018-01-02
9853166 Perfectly symmetric gate-all-around FET on suspended nanowire Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek 2017-12-26
9847259 Germanium dual-fin field effect transistor Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2017-12-19
9837509 Semiconductor device including strained finFET Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2017-12-05
9837415 FinFET structures having silicon germanium and silicon fins with suppressed dopant diffusion Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2017-12-05
9837414 Stacked complementary FETs featuring vertically stacked horizontal nanowires Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2017-12-05
9837406 III-V FINFET devices having multiple threshold voltages Karthik Balakrishnan, Alexander Reznicek 2017-12-05
9825122 Multiple work function device using GeOx/TiN cap on work function setting metal Takashi Ando, Choonghyun Lee 2017-11-21
9818647 Germanium dual-fin field effect transistor Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek 2017-11-14
9812575 Contact formation for stacked FinFETs Alexander Reznicek, Kangguo Cheng, Dominic J. Schepis 2017-11-07
9812571 Tensile strained high percentage silicon germanium alloy FinFETs Bruce B. Doris, Alexander Reznicek, Joshua M. Rubin, Robin M. Schulz 2017-11-07