Issued Patents All Time
Showing 76–100 of 138 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8775858 | Heterogeneous recovery in a redundant memory system | Kevin C. Gower, Luis A. Lastras-Montano, Vesselina K. Papazova, Eldee Stephens | 2014-07-08 |
| 8769335 | Homogeneous recovery in a redundant memory system | Kevin C. Gower, Luis A. Lastras-Montano, Vesselina K. Papazova, Eldee Stephens | 2014-07-01 |
| 8713387 | Channel marking for chip mark overflow and calibration errors | Judy S. Johnson, Luis A. Lastras-Montano, Eldee Stephens | 2014-04-29 |
| 8631271 | Heterogeneous recovery in a redundant memory system | Kevin C. Gower, Lisa C. Gower, Luis A. Lastras-Montano, Vesselina K. Papazova, Eldee Stephens | 2014-01-14 |
| 8595570 | Bitline deletion | Ekaterina M. Ambroladze | 2013-11-26 |
| 8566682 | Failing bus lane detection using syndrome analysis | Kevin C. Gower, Luis A. Lastras-Montano | 2013-10-22 |
| 8549378 | RAIM system using decoding of virtual ECC | Luiz C. Alves, Luis A. Lastras-Montano, Eldee Stephens, Barry M. Trager | 2013-10-01 |
| 8522122 | Correcting memory device and memory channel failures in the presence of known memory device failures | Luiz C. Alves, Luis A. Lastras-Montano, Eldee Stephens, Barry M. Trager | 2013-08-27 |
| 8484529 | Error correction and detection in a redundant memory system | Luiz C. Alves, Kevin C. Gower, Luis A. Lastras-Montano, Eldee Stephens | 2013-07-09 |
| 8423875 | Collecting failure information on error correction code (ECC) protected data | Arthur J. O'Neill | 2013-04-16 |
| 8364899 | User-controlled targeted cache purge | Ekaterina M. Ambroladze, Arthur J. O'Neill | 2013-01-29 |
| 8365055 | High performance cache directory error correction code | Ekaterina M. Ambroladze, Arthur J. O'Neill | 2013-01-29 |
| 8316284 | Collecting failure information on error correction code (ECC) protected data | Arthur J. O'Neill | 2012-11-20 |
| 8271932 | Hierarchical error injection for complex RAIM/ECC design | Dean G. Bair, Luis A. Lastras-Montano, Alia Shah, Eldee Stephens | 2012-09-18 |
| 8195986 | Method, system and computer program product for processing error information in a system | Mark S. Farrell, Liyong Wang, Rebecca S. Wisniewski | 2012-06-05 |
| 8122297 | Method and apparatus for parallel and serial data transfer | Ra'ed Mohammad Al-Omari, Michael Fee, Pak-kin Mak, Scott Barnett Swaney | 2012-02-21 |
| 8095837 | Method and apparatus for improving random pattern testing of logic structures | Mary P. Kusko, Barry W. Krumm, Bryan J. Robbins | 2012-01-10 |
| 7996715 | Multi nodal computer system and method for handling check stops in the multi nodal computer system | Karin Rebmann, Dietmar Schmunkamp, Tobias Webel, Thomas E. Gilbert, Timothy G. McNamara | 2011-08-09 |
| 7987400 | Method for optimizing scan chains in an integrated circuit that has multiple levels of hierarchy | Christopher J. Berry, Lawrence D. Curley, Diana L. Orf | 2011-07-26 |
| 7984341 | Method, system and computer program product involving error thresholds | Rebecca S. Wisniewski, Mark S. Farrell | 2011-07-19 |
| 7979838 | Method of automating creation of a clock control distribution network in an integrated circuit floorplan | Christopher J. Berry, Jose L. Neves, Lawrence D. Curley, Travis W. Pouarz, William J. Scarpero, Jr. | 2011-07-12 |
| 7882322 | Early directory access of a double data rate elastic interface | Christopher J. Berry, Jonathan Y. Chen, Michael Fee, Alan P. Wagstaff | 2011-02-01 |
| 7809874 | Method for resource sharing in a multiple pipeline environment | Michael Fee, Christopher M. Carney | 2010-10-05 |
| 7783911 | Programmable bus driver launch delay/cycle delay to reduce elastic interface elasticity requirements | Jonathan Y. Chen, Gary A. Van Huben, David A. Webber | 2010-08-24 |
| 7752475 | Late data launch for a double data rate elastic interface | Christopher J. Berry, Jonathan Y. Chen, Michael Fee, Alan P. Wagstaff | 2010-07-06 |