Michael Putrino — 19 Patents at IBM

Michael Putrino has been granted 19 US patents while listed as an inventor at IBM. The first was granted in 1990 and the most recent in February 2003. Michael Putrino ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Michael Putrino in Endicott, NY, US.

Patents per Year

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Showing 1–19 of 19 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
6519620	Saturation select apparatus and method therefor	Huy V. Nguyen, Charles P. Roth	2003-02-11	$11,665,000
6324638	Processor having vector processing capability and method for executing a vector instruction in a processor	Thomas Elmer	2001-11-27	$23,652,000
6098168	System for completing instruction out-of-order which performs target address comparisons prior to dispatch	Lee Evan Eisen	2000-08-01	$27,147,000
5872948	Processor and method for out-of-order execution of instructions based upon an instruction parameter	Soummya Mallick, Rajesh B. Patel, Romesh Mangho Jessani	1999-02-16	$10,802,000
5809323	Method and apparatus for executing fixed-point instructions within idle execution units of a superscalar processor	Lee Evan Eisen, Robert T. Golla, Soummya Mallick, Sung Ho Park, Rajesh B. Patel	1998-09-15	$10,805,000
5805916	Method and apparatus for dynamic allocation of registers for intermediate floating-point results	Soummya Mallick, Romesh Mangho Jessani	1998-09-08
5805475	Load-store unit and method of loading and storing single-precision floating-point registers in a double-precision architecture	Lee Evan Eisen	1998-09-08	$9,023,000
5805487	Method and system for fast determination of sticky and guard bits	Timothy A. Elliott, Christopher H. Olson	1998-09-08	$9,023,000
5765191	Method for implementing a four-way least recently used (LRU) mechanism in high-performance	Albert J. Loper, Soummya Mallick, Rajesh Patel	1998-06-09	$6,285,000
5754811	Instruction dispatch queue for improved instruction cache to queue timing	Soummya Mallick, Albert J. Loper	1998-05-19
5732005	Single-precision, floating-point register array for floating-point units performing double-precision operations by emulation	James Allan Kahle, Tai Dinh Ngo, Aubrey Deene Ogden, Johm Victor Sell	1998-03-24	$15,296,000
5678016	Processor and method for managing execution of an instruction which determine subsequent to dispatch if an instruction is subject to serialization	Lee Evan Eisen, Robert T. Golla, Christopher H. Olson	1997-10-14	$31,107,000
5611063	Method for executing speculative load instructions in high-performance processors	Albert J. Loper, Soummya Mallick	1997-03-11	$14,179,000
5375078	Arithmetic unit for performing XY+B operation	David A. Hrusecky	1994-12-20	$10,417,000
4947359	Apparatus and method for prediction of zero arithmetic/logic results	Stamatis Vassiliadis, Ann E. Huffman, Brice J. Feal, Gerald George Pechanek	1990-08-07	$17,044,000
4924422	Method and apparatus for modified carry-save determination of arithmetic/logic zero results	Stamatis Vassiliadis, Ann E. Huffman, Brice J. Feal, Gerald George Pechanek	1990-05-08	$16,557,000
4924424	Parity prediction for binary adders with selection	Stamatis Vassiliadis, Eric M. Schwarz, Brice J. Feal	1990-05-08	$16,557,000
4914617	High performance parallel binary byte adder	Stamatis Vassiliadis, Eric M. Schwartz	1990-04-03	$11,569,000
4914579	Apparatus for branch prediction for computer instructions	Stamatis Vassiliadis, Ann E. Huffman, Agnes Y. Ngai	1990-04-03	$11,569,000

Michael Putrino — 19 Patents

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