Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6430190 | Method and apparatus for message routing, including a content addressable memory | Alexander Dankwart Essbaum | 2002-08-06 |
| 6236658 | Method and apparatus for message routing, including a content addressable memory | Alexander Dankwart Essbaum | 2001-05-22 |
| 5978896 | Method and system for increased instruction dispatch efficiency in a superscalar processor system | James Allan Kahle, Chin-Cheng Kau, David S. Levitan | 1999-11-02 |
| 5898882 | Method and system for enhanced instruction dispatch in a superscalar processor system utilizing independently accessed intermediate storage | James Allan Kahle, Chin-Cheng Kau, Ali A. Poursepanj, Paul Kang-Guo Tu, Donald E. Waldecker | 1999-04-27 |
| 5867684 | Method and processor that permit concurrent execution of a store multiple instruction and a dependent instruction | James Allan Kahle, Albert J. Loper, Soummya Mallick | 1999-02-02 |
| 5764942 | Method and system for selective serialization of instruction processing in a superscalar processor system | James Allan Kahle, Chin-Cheng Kau, Ali A. Poursepanj, Paul Kang-Guo Tu, Donald E. Waldecker | 1998-06-09 |
| 5764969 | Method and system for enhanced management operation utilizing intermixed user level and supervisory level instructions with partial concept synchronization | James Allan Kahle, Albert J. Loper, Soummya Mallick, John V. Sell | 1998-06-09 |
| 5758141 | Method and system for selective support of non-architected instructions within a superscaler processor system utilizing a special access bit within a machine state register | James Allan Kahle, Albert J. Loper, Soummya Mallick, John V. Sell | 1998-05-26 |
| 5732005 | Single-precision, floating-point register array for floating-point units performing double-precision operations by emulation | James Allan Kahle, Tai Dinh Ngo, Michael Putrino, Johm Victor Sell | 1998-03-24 |
| 5715420 | Method and system for efficient memory management in a data processing system utilizing a dual mode translation lookaside buffer | James Allan Kahle, Albert J. Loper, John V. Sell, Gregory L. Limes | 1998-02-03 |
| 5694565 | Method and device for early deallocation of resources during load/store multiple operations to allow simultaneous dispatch/execution of subsequent instructions | James Allan Kahle, Albert J. Loper, Soummya Mallick | 1997-12-02 |
| 5655141 | Method and system for storing information in a processing system | Neil Ray Vanderschaaf | 1997-08-05 |
| 5539681 | Circuitry and method for reducing power consumption within an electronic circuit | Michael C. Alexander, Arturo L. Arizpe, Gianfranco Gerosa, James Allan Kahle | 1996-07-23 |
| 5491829 | Method and system for indexing the assignment of intermediate storage buffers in a superscalar processor system | Chin-Cheng Kau, Donald E. Waldecker | 1996-02-13 |
| 5465373 | Method and system for single cycle dispatch of multiple instructions in a superscalar processor system | James Allan Kahle, Chin-Cheng Kau, David S. Levitan, Ali A. Poursepanj, Paul Kang-Guo Tu +1 more | 1995-11-07 |
| 5420808 | Circuitry and method for reducing power consumption within an electronic circuit | Michael C. Alexander, Arturo L. Arizpe, Gianfranco Gerosa, James Allan Kahle | 1995-05-30 |
| 5341502 | Device for assigning a shared resource in a data processing system | Anita S. Grossman, Chin-Cheng Kau, Mason Weems | 1994-08-23 |