Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Thomas Elmer — 38 Patents

Amazon: 16 patents #797 of 19,158Top 5%
VCVia Alliance Semiconductor Co.: 9 patents #12 of 157Top 8%
CWCorning Glass Works: 5 patents #61 of 496Top 15%
NANilfisk A/S: 2 patents #9 of 62Top 15%
CICorning Incorporated: 2 patents #1,852 of 3,890Top 50%
IBM: 1 patents #44,878 of 70,183Top 65%
NVIDIA: 1 patents #4,387 of 7,811Top 60%
Austin, TX: #720 of 18,064 inventorsTop 4%
Texas: #2,724 of 125,132 inventorsTop 3%
Overall (All Time): #84,675 of 4,157,543Top 3%
38 Patents All Time
Thomas Elmer has been granted 38 US patents while listed as an inventor at Amazon. The first was granted in 1982 and the most recent in September 2025. Thomas Elmer ranks #84,675 of 4,157,543 US inventors in our database (top 2.0%). Patent records list Thomas Elmer in Austin, TX, US.

Issued Patents All Time

Showing 1–25 of 38 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12423058 Systolic array with input reduction to multiple reduced inputs Paul Gilbert Meyer, Thomas A. Volpe, Ron Diamant, Joshua W. Bowman, Nishith Desai 2025-09-23
12423097 Significand shifting in floating point processing operations Anisha Saini, Mairin Imro Kroes, Neil Burgess 2025-09-23
12182064 Multiple accumulate busses in a systolic array Thomas A. Volpe, Sundeep Amirineni 2024-12-31 $442,371,000
12182691 Increasing performance of computational array accelerators Sundeep Amirineni, Akshay Balasubramanian, Joshua W. Bowman, Ron Diamant, Paul Gilbert Meyer 2024-12-31 $442,371,000
12067375 Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range 2024-08-20 $339,137,000
11880682 Systolic array with efficient input reduction and extended array performance Paul Gilbert Meyer, Thomas A. Volpe, Ron Diamant, Joshua W. Bowman, Nishith Desai 2024-01-23 $449,980,000
11842169 Systolic multiply delayed accumulate processor architecture 2023-12-12 $321,215,000
11816446 Systolic array component combining multiple integer and floating-point data types Thomas A. Volpe 2023-11-14 $323,276,000
11762803 Multiple accumulate busses in a systolic array Thomas A. Volpe, Sundeep Amirineni 2023-09-19 $263,420,000
11467806 Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range 2022-10-11 $146,680,000
11422773 Multiple busses within a systolic array processing element Thomas A. Volpe, Kiran Kalkunte Seshadri 2022-08-23 $203,003,000
11423313 Configurable function approximation based on switching mapping table content Ron Diamant, Sundeep Amirineni, Mohammad El-Shabani, Kenneth Wayne Patton 2022-08-23 $203,003,000
11308026 Multiple busses interleaved in a systolic array Thomas A. Volpe, Vasanta Kumar Palisetti, Kiran Kalkunte Seshadri, Fnu Arun Kumar 2022-04-19 $209,456,000
11308027 Multiple accumulate busses in a systolic array Thomas A. Volpe, Sundeep Amirineni 2022-04-19 $209,456,000
11232062 Parallelism within a systolic array using multiple accumulate busses Thomas A. Volpe, Sundeep Amirineni 2022-01-25
11061672 Chained split execution of fused compound arithmetic operations Nikhil Patil 2021-07-13
10983754 Accelerated quantized multiply-and-add operations Dana Michelle Vantrease, Randy Renfu Huang, Ron Diamant, Sundeep Amirineni 2021-04-20 $334,481,000
10817260 Reducing dynamic power consumption in arrays Randy Renfu Huang, Ron Diamant, Sundeep Amirineni, Thomas A. Volpe 2020-10-27 $323,076,000
10674882 Adapter plate Henrik Mathiassen, Steen Klimt Johannesen, Trine Baek Nielsen 2020-06-09
10678508 Accelerated quantized multiply-and-add operations Dana Michelle Vantrease, Randy Renfu Huang, Ron Diamant, Sundeep Amirineni 2020-06-09 $210,601,000
10078512 Processing denormal numbers in FMA hardware 2018-09-18
10019230 Calculation control indicator cache 2018-07-10
10019229 Calculation control indicator cache 2018-07-10
9891887 Subdivision of a fused compound arithmetic operation 2018-02-13
9891886 Split-path heuristic for performing a fused FMA operation 2018-02-13