Issued Patents All Time
Showing 25 most recent of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423058 | Systolic array with input reduction to multiple reduced inputs | Paul Gilbert Meyer, Thomas A. Volpe, Ron Diamant, Joshua W. Bowman, Nishith Desai | 2025-09-23 |
| 12423097 | Significand shifting in floating point processing operations | Anisha Saini, Mairin Imro Kroes, Neil Burgess | 2025-09-23 |
| 12182064 | Multiple accumulate busses in a systolic array | Thomas A. Volpe, Sundeep Amirineni | 2024-12-31 |
| 12182691 | Increasing performance of computational array accelerators | Sundeep Amirineni, Akshay Balasubramanian, Joshua W. Bowman, Ron Diamant, Paul Gilbert Meyer | 2024-12-31 |
| 12067375 | Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range | — | 2024-08-20 |
| 11880682 | Systolic array with efficient input reduction and extended array performance | Paul Gilbert Meyer, Thomas A. Volpe, Ron Diamant, Joshua W. Bowman, Nishith Desai | 2024-01-23 |
| 11842169 | Systolic multiply delayed accumulate processor architecture | — | 2023-12-12 |
| 11816446 | Systolic array component combining multiple integer and floating-point data types | Thomas A. Volpe | 2023-11-14 |
| 11762803 | Multiple accumulate busses in a systolic array | Thomas A. Volpe, Sundeep Amirineni | 2023-09-19 |
| 11467806 | Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range | — | 2022-10-11 |
| 11422773 | Multiple busses within a systolic array processing element | Thomas A. Volpe, Kiran Kalkunte Seshadri | 2022-08-23 |
| 11423313 | Configurable function approximation based on switching mapping table content | Ron Diamant, Sundeep Amirineni, Mohammad El-Shabani, Kenneth Wayne Patton | 2022-08-23 |
| 11308026 | Multiple busses interleaved in a systolic array | Thomas A. Volpe, Vasanta Kumar Palisetti, Kiran Kalkunte Seshadri, Fnu Arun Kumar | 2022-04-19 |
| 11308027 | Multiple accumulate busses in a systolic array | Thomas A. Volpe, Sundeep Amirineni | 2022-04-19 |
| 11232062 | Parallelism within a systolic array using multiple accumulate busses | Thomas A. Volpe, Sundeep Amirineni | 2022-01-25 |
| 11061672 | Chained split execution of fused compound arithmetic operations | Nikhil Patil | 2021-07-13 |
| 10983754 | Accelerated quantized multiply-and-add operations | Dana Michelle Vantrease, Randy Renfu Huang, Ron Diamant, Sundeep Amirineni | 2021-04-20 |
| 10817260 | Reducing dynamic power consumption in arrays | Randy Renfu Huang, Ron Diamant, Sundeep Amirineni, Thomas A. Volpe | 2020-10-27 |
| 10674882 | Adapter plate | Henrik Mathiassen, Steen Klimt Johannesen, Trine Baek Nielsen | 2020-06-09 |
| 10678508 | Accelerated quantized multiply-and-add operations | Dana Michelle Vantrease, Randy Renfu Huang, Ron Diamant, Sundeep Amirineni | 2020-06-09 |
| 10078512 | Processing denormal numbers in FMA hardware | — | 2018-09-18 |
| 10019230 | Calculation control indicator cache | — | 2018-07-10 |
| 10019229 | Calculation control indicator cache | — | 2018-07-10 |
| 9891887 | Subdivision of a fused compound arithmetic operation | — | 2018-02-13 |
| 9891886 | Split-path heuristic for performing a fused FMA operation | — | 2018-02-13 |