Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Ron Diamant — 204 Patents

Amazon: 202 patents #7 of 19,158Top 1%
San Jose, CA: #55 of 32,062 inventorsTop 1%
California: #540 of 386,348 inventorsTop 1%
Overall (All Time): #3,240 of 4,157,543Top 1%
204 Patents All Time
Ron Diamant has been granted 204 US patents while listed as an inventor at Amazon. The first was granted in 2016 and the most recent in December 2025. Ron Diamant ranks #3,240 of 4,157,543 US inventors in our database (top 0.08%). Patent records list Ron Diamant in San Jose, CA, US.

Issued Patents All Time

Showing 1–25 of 204 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12511544 Feature-map throughput during training process Kui Xu 2025-12-30
12505339 Accelerated memory copy operations Xin Tong 2025-12-23
12499353 Configurable function approximation based on hardware selection of mapping table content Sundeep Amirineni, Mohammad El-Shabani, Kenneth Wayne Patton 2025-12-16
12468507 Reducing power consumption in integrated circuits Paul Gilbert Meyer, Sundeep Amirineni 2025-11-11
12443823 Neural network processing based on subgraph recognition Richard John Heaton, Randy Renfu Huang 2025-10-14
12436906 Multi-threaded data movement request handling Mohammad El-Shabani, Henry Wang, Zhao Ma 2025-10-07
12423580 Crossbar based transpose data transfers Patricio Kaplan 2025-09-23
12423058 Systolic array with input reduction to multiple reduced inputs Paul Gilbert Meyer, Thomas A. Volpe, Joshua W. Bowman, Nishith Desai, Thomas Elmer 2025-09-23
12400106 Arithmetic-intensity based load cloning Robert Geva, Jindrich Zejda, Tiandong Zhao 2025-08-26
12380321 Flexible array data loading Paul Gilbert Meyer 2025-08-05
12373691 Executing sublayers of a fully-connected layer Randy Renfu Huang 2025-07-29
12354010 Gradient compression for distributed training Kun Xu 2025-07-08
12333274 Data-type-aware clock-gating Joshua W. Bowman, Thomas A. Volpe, Sundeep Amirineni, Nishith Desai 2025-06-17
12314837 Multi-memory on-chip computational network Randy Renfu Huang 2025-05-27
12306777 Hierarchical collective compute operations using DMA transfers Yongseok Koh, Se Wang Oh 2025-05-20
12271732 Configuration of a deep vector engine using an opcode table, control table, and datapath table Paul Gilbert Meyer, Sundeep Amirineni 2025-04-08
12260214 Throughput increase for compute engine Paul Gilbert Meyer, Sundeep Amirineni, Sunil Kumar Bathula 2025-03-25
12254398 Sparse machine learning acceleration Kun Xu, Patricio Kaplan 2025-03-18
12242853 Configurable vector compute engine Paul Gilbert Meyer, Sundeep Amirineni 2025-03-04
12210940 On-circuit activity monitoring for modifying integrated circuit processing Thomas A. Volpe 2025-01-28
12205013 Accelerated convolution of neural networks Thiam Khean Hah, Randy Renfu Huang, Richard John Heaton, Vignesh Vivekraja 2025-01-21
12204757 Strong ordered transaction for DMA transfers Kun Xu, Ilya Minkin, Raymond Scott Whiteside 2025-01-21
12198041 Efficient utilization of processing element array Jeffrey T. Huynh, Hongbin Zheng, Yizhi Liu, Animesh Jain, Yida Wang +5 more 2025-01-14
12197308 On-circuit utilization monitoring for a systolic array Thomas A. Volpe 2025-01-14
12189569 Distributive training with multicast Kun Xu 2025-01-07