HZ

Hongbin Zheng

AM Amazon: 16 patents #793 of 19,158Top 5%
AM AMD: 3 patents #3,141 of 9,279Top 35%
Xiaomi: 3 patents #290 of 1,395Top 25%
SU Southwest Jiaotong University: 1 patents #66 of 321Top 25%
Overall (All Time): #166,318 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12430110 Global modulo allocation in neural network compilation Randy Renfu Huang, Robert Geva 2025-09-30
12423137 Compiler managed tensor parallel execution Yuwen Jia 2025-09-23
12417082 Frontier node-based data layout analysis framework Sheng Xu, Qingrui Liu, Jason Xiong 2025-09-16
12334596 Battery assembly and electronic device Shuaipeng Xi, Jinhu Zhang, Lingli Han 2025-06-17
12198041 Efficient utilization of processing element array Jeffrey T. Huynh, Ron Diamant, Yizhi Liu, Animesh Jain, Yida Wang +5 more 2025-01-14
D1057302 Car seat extender for dogs 2025-01-07
12182688 Hierarchical partitioning of operators Animesh Jain, Yizhi Liu, Jeffrey T. Huynh, Haichen Li, Drazen Borkovic +5 more 2024-12-31
12175222 Converting quasi-affine expressions to matrix operations Michael Ray Benfield, Thomas Robert Norell 2024-12-24
12159218 Dropout layer in a neural network processor Jiading Gai, Animesh Jain, Randy Renfu Huang, Vignesh Vivekraja 2024-12-03
12148894 Battery module and terminal device Liangliang Xu, Xuewen Wei, Zeng Gao 2024-11-19
12087971 Power supply assembly and method for manufacturing the same Longfei DU, Xuewen Wei, Zongqiang Wang 2024-09-10
12079734 Compilation time reduction for memory and compute bound neural networks Randy Renfu Huang, Richard John Heaton 2024-09-03
12045611 Reconfigurable neural network processing based on subgraph recognition Ron Diamant, Drazen Borkovic, Haichen Li 2024-07-23
11941383 Compilation with caching of code analysis result Pushkar Ratnalikar 2024-03-26
11809849 Global modulo allocation in neural network compilation Randy Renfu Huang, Robert Geva 2023-11-07
11782706 Reconfigurable neural network processing based on subgraph recognition Ron Diamant, Drazen Borkovic, Haichen Li 2023-10-10
11741350 Efficient utilization of processing element array Jeffrey T. Huynh, Ron Diamant, Yizhi Liu, Animesh Jain, Yida Wang +5 more 2023-08-29
11498773 Material layered conveying device based on disassembly line Zeqiang ZHANG, Yanqing Zeng, Silu Liu, Dan Ji, Xiaoyue FANG 2022-11-15
11494321 State buffer memloc reshaping Yunxuan Yu, Qingrui Liu 2022-11-08
11461662 Compilation time reduction for memory and compute bound neural networks Randy Renfu Huang, Richard John Heaton 2022-10-04
11373024 Circuit simulation based on a high-level language circuit specification Sahil Goyal, Mahesh Attarde, Amit Kasat 2022-06-28
11144291 Loop-oriented neural network compilation Preston Pengra Briggs, III, Tobias Edler Von Koch, Taemin Kim, Randy Renfu Huang 2021-10-12
9824172 Performance of circuitry generated using high-level synthesis Kecheng Hao, Stephen A. Neuendorffer 2017-11-21
9710584 Performance of circuitry generated using high-level synthesis Kecheng Hao, Stephen A. Neuendorffer 2017-07-18