Animesh Jain — 14 Patents at Amazon

Animesh Jain has been granted 14 US patents while listed as an inventor at Amazon. The first was granted in 2012 and the most recent in June 2025. Animesh Jain ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Animesh Jain in Sunnyvale, CA, US.

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Showing 1–14 of 14 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12321849	Performing hardware operator fusion	Tobias Edler Von Koch, Yizhi Liu, Taemin Kim, Jindrich Zejda, Yida Wang +3 more	2025-06-03
12198041	Efficient utilization of processing element array	Jeffrey T. Huynh, Ron Diamant, Hongbin Zheng, Yizhi Liu, Yida Wang +5 more	2025-01-14
12182688	Hierarchical partitioning of operators	Yizhi Liu, Hongbin Zheng, Jeffrey T. Huynh, Haichen Li, Drazen Borkovic +5 more	2024-12-31	$442,371,000
12159218	Dropout layer in a neural network processor	Jiading Gai, Hongbin Zheng, Randy Renfu Huang, Vignesh Vivekraja	2024-12-03	$636,897,000
11923852	High to low level shifter architecture using lower voltage devices	Prateek Mishra, Thanapandi G, Jagadeesh Anathahalli Singrigowda, Dhruvin Devangbhai Shah, Girish Anathahalli Singrigowda	2024-03-05	$588,545,000
11809981	Performing hardware operator fusion	Tobias Edler Von Koch, Yizhi Liu, Taemin Kim, Jindrich Zejda, Yida Wang +3 more	2023-11-07	$260,345,000
11741350	Efficient utilization of processing element array	Jeffrey T. Huynh, Ron Diamant, Hongbin Zheng, Yizhi Liu, Yida Wang +5 more	2023-08-29	$258,572,000
11715002	Efficient data encoding for deep neural network training	Amar Phanishayee, Gennady Pekhimenko	2023-08-01	$339,452,000
11463084	Level shifting output circuit	Thanapandi Ganesan, Prateek Mishra, Jagadeesh Anathahalli Singrigowda, Dhruvin Devangbhai Shah, Girish Anathahalli Singrigowda	2022-10-04	$225,140,000
10637472	Reference voltage generation for current mode logic	Aditya Mitra	2020-04-28	$42,649,000
9881723	Eight piece quadrupole magnet, method for aligning quadrupole magent pole tips	Mark S. Jaski, Jie Liu, Aric T. Donnelly, Joshua S. Downey, Jeremy J. Nudell	2018-01-30
8504866	Supplying hysteresis effect mitigated clock signals based on silicon-test characterized parameter	Arun Sundaresan Iyer, Bhawna Tomar, Krishna Sethupathy Leela	2013-08-06	$2,454,000
8238187	Fast cyclic decoder circuit for FIFO/LIFO data buffer	Nagendra Chandrakar, Sonia Ghosh	2012-08-07	$3,769,000
8120406	Sequential circuit with dynamic pulse width control	Arun Sundaresan Iyer, Shibashish Patel	2012-02-21

Animesh Jain — 14 Patents

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