Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8504866 | Supplying hysteresis effect mitigated clock signals based on silicon-test characterized parameter | Arun Sundaresan Iyer, Bhawna Tomar, Animesh Jain | 2013-08-06 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8504866 | Supplying hysteresis effect mitigated clock signals based on silicon-test characterized parameter | Arun Sundaresan Iyer, Bhawna Tomar, Animesh Jain | 2013-08-06 |