GP

Gerald George Pechanek

IN Intel: 65 patents #432 of 30,777Top 2%
IBM: 33 patents #2,996 of 70,183Top 5%
PT Pts: 23 patents #1 of 123Top 1%
BO Bops: 16 patents #1 of 12Top 9%
BS Billions Of Operations Per Second: 8 patents #1 of 11Top 10%
Overall (All Time): #5,345 of 4,157,543Top 1%
161
Patents All Time

Issued Patents All Time

Showing 25 most recent of 161 patents

Patent #TitleCo-InventorsDate
11249939 Methods and apparatus for sharing nodes in a network with connections based on 1 to k+1 adjacency used in an execution array memory array (XarMa) processor 2022-02-15
10503515 Methods and apparatus for adjacency network delivery of operands to instruction specified destinations that reduces storage of temporary variables 2019-12-10
10078517 Methods and apparatus for signal flow graph pipelining in an array processing unit that reduces storage of temporary variables 2018-09-18
9672033 Methods and apparatus for transforming, loading, and executing super-set instructions Larry D. Larsen 2017-06-06
9507603 Methods and apparatus for signal flow graph pipelining that reduce storage of temporary variables 2016-11-29
9460048 Methods and apparatus for creating and executing a packet of instructions organized according to data dependencies between adjacent instructions and utilizing networks based on adjacencies to transport data in response to execution of the instructions 2016-10-04
9400652 Methods and apparatus for address translation functions Edwin Franklin Barry 2016-07-26
9390057 Communicaton across shared mutually exclusive direction paths between clustered processing elements Charles W. Kurak, Jr. 2016-07-12
9329866 Methods and apparatus for adapting pipeline stage latency based on instruction type Edwin Franklin Barry, Patrick R. Marchand 2016-05-03
9300958 Methods and apparatus for motion search refinement in a SIMD array processor Mihailo M. Stojancic 2016-03-29
9158547 Methods and apparatus for scalable array processor interrupt detection and response Edwin Franklin Barry, Patrick R. Marchand, Larry D. Larsen 2015-10-13
9075651 Methods and apparatus for efficient complex long multiplication and covariance matrix implementation Ricardo E. Rodriguez, Matthew Plonski, David Strube, Kevin Coopman 2015-07-07
9063722 Methods and apparatus for independent processor node operations in a SIMD array processor Edwin Franklin Barry, Mihailo M. Stojancic 2015-06-23
9060169 Methods and apparatus for providing a scalable deblocking filtering assist function within an array processor Mihailo M. Stojancic 2015-06-16
9021236 Methods and apparatus for storing expanded width instructions in a VLIW memory for deferred execution Stamatis Vassiliadis 2015-04-28
9015354 Efficient complex multiplication and fast fourier transform (FFT) implementation on the ManArray architecture Nikos P. Pitsianis, Ricardo E. Rodriguez 2015-04-21
9009365 System core for transferring data between an external device and memory David Strube, Edwin Franklin Barry, Charles W. Kurak, Jr., Carl Donald Busboom, Dale Edward Schneider +6 more 2015-04-14
8904152 Efficient complex multiplication and fast fourier transform (FFT) implementation on the ManArray architecture Nikos P. Pitsianis, Ricardo E. Rodriguez 2014-12-02
8751772 Methods and apparatus for scalable array processor interrupt detection and response Edwin Franklin Barry, Patrick R. Marchand, Larry D. Larsen 2014-06-10
8713284 Methods and apparatus for address translation functions Edwin Franklin Barry 2014-04-29
8693548 Methods and apparatus for motion search refinement in a SIMD array processor Mihailo M. Stojancic 2014-04-08
8671266 Staging register file for use with multi-stage execution units Stamatis Vassiliadis 2014-03-11
8542744 Methods and apparatus for providing a scalable deblocking filtering assist function within an array processor Mihailo M. Stojancic 2013-09-24
8489858 Methods and apparatus for scalable array processor interrupt detection and response Edwin Franklin Barry, Patrick R. Marchand, Larry D. Larsen 2013-07-16
8484444 Methods and apparatus for attaching application specific functions within an array processor Mihailo M. Stojancic 2013-07-09