Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Patrick R. Marchand — 60 Patents

NVIDIA: 24 patents #234 of 7,811Top 3%
Intel: 18 patents #2,313 of 30,777Top 8%
PTPts: 9 patents #8 of 123Top 7%
JEJeumont-Schneider: 1 patents #17 of 64Top 30%
MIMichelin: 1 patents #793 of 1,446Top 55%
BSBillions Of Operations Per Second: 1 patents #7 of 11Top 65%
EUEcolab Usa: 1 patents #1,406 of 1,826Top 80%
BOBops: 1 patents #11 of 12Top 95%
GSGec Alsthom T&D Sa: 1 patents #47 of 166Top 30%
Surrey, CA: #1 of 718 inventorsTop 1%
Overall (All Time): #38,820 of 4,157,543Top 1%
60 Patents All Time
Patrick R. Marchand has been granted 60 US patents while listed as an inventor at NVIDIA. The first was granted in 1987 and the most recent in January 2025. Patrick R. Marchand ranks #38,820 of 4,157,543 US inventors in our database (top 0.93%). Patent records list Patrick R. Marchand in Surrey, BC, CA.

Issued Patents All Time

Showing 1–25 of 60 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12187987 Non-foaming peracetic compositions, methods, and kits for removing biofilms from an enclosed surface Audrey-Anne Lafond 2025-01-07
10920263 Methods, compositions and kits for determining cleanness of a surface Dominic Desrosiers 2021-02-16
10515011 Compression status bit cache and backing store David B. Glasco, Peter B. Holmqvist, George R. Lynch, Karan Mehra, James Roberts 2019-12-24
9329866 Methods and apparatus for adapting pipeline stage latency based on instruction type Edwin Franklin Barry, Gerald George Pechanek 2016-05-03
9158547 Methods and apparatus for scalable array processor interrupt detection and response Edwin Franklin Barry, Gerald George Pechanek, Larry D. Larsen 2015-10-13 $34,312,000
9009365 System core for transferring data between an external device and memory Gerald George Pechanek, David Strube, Edwin Franklin Barry, Charles W. Kurak, Jr., Carl Donald Busboom +6 more 2015-04-14 $50,684,000
8963940 Isochronous hub contracts Duncan A. Riach, Robert A. Alfieri, Brijesh Tripathi 2015-02-24 $8,823,000
8949541 Techniques for evicting dirty data from a cache using a notification sorter and count thresholds David B. Glasco, Peter B. Holmqvist, George R. Lynch, James Roberts, John H. Edmondson 2015-02-03 $4,737,000
8874844 Padding buffer requests to avoid reads of invalid data David B. Glasco, Peter B. Holmqvist, George R. Lynch, James Roberts 2014-10-28 $4,694,000
8868838 Multi-class data cache policies David B. Glasco, Peter B. Holmqvist, George R. Lynch, James Roberts 2014-10-21 $7,372,000
8862823 Compression status caching David B. Glasco, Cass W. Everitt, David Kirk McAllister, Emmett M. Kilgariff, George R. Lynch +4 more 2014-10-14 $3,953,000
8751772 Methods and apparatus for scalable array processor interrupt detection and response Edwin Franklin Barry, Gerald George Pechanek, Larry D. Larsen 2014-06-10 $7,521,000
8700862 Compression status bit cache and backing store David B. Glasco, Peter B. Holmqvist, George R. Lynch, Karan Mehra, James Roberts 2014-04-15 $1,804,000
8627041 Efficient line and page organization for compression status bit caching David B. Glasco, Peter B. Holmqvist, George R. Lynch, Karan Mehra, James Roberts +2 more 2014-01-07 $9,683,000
8595437 Compression status bit cache with deterministic isochronous latency David B. Glasco, Peter B. Holmqvist, George R. Lynch, Karan Mehra, James Roberts 2013-11-26 $5,902,000
8539130 Virtual channels for effective packet transfer David B. Glasco, Dane T. Mrazek, Samuel H. Duncan, Ravi Manyam, Yin Fung Tang +1 more 2013-09-17 $3,489,000
8504773 Storing dynamically sized buffers within a cache David B. Glasco, Peter B. Holmqvist, George R. Lynch, James Roberts 2013-08-06 $5,004,000
8489858 Methods and apparatus for scalable array processor interrupt detection and response Edwin Franklin Barry, Gerald George Pechanek, Larry D. Larsen 2013-07-16 $11,358,000
8464001 Cache and associated method with frame buffer managed dirty data pull and high-priority clean mechanism John H. Edmondson, David B. Glasco, Peter B. Holmqvist, George R. Lynch, James Roberts 2013-06-11 $6,924,000
8413086 Methods and apparatus for adapting pipeline stage latency based on instruction type Edwin Franklin Barry, Gerald George Pechanek 2013-04-02 $13,128,000
8397000 System core for transferring data between an external device and memory Gerald George Pechanek, David Strube, Edwin Franklin Barry, Charles W. Kurak, Jr., Carl Donald Busboom +6 more 2013-03-12 $10,064,000
8392667 Deadlock avoidance by marking CPU traffic as special Samuel H. Duncan, David B. Glasco, Wei-Je Huang, Atul Kalambur, Dennis Ma 2013-03-05 $8,122,000
8296479 System core for transferring data between an external device and memory Gerald George Pechanek, David Strube, Edwin Franklin Barry, Charles W. Kurak, Jr., Carl Donald Busboom +6 more 2012-10-23 $5,405,000
8271734 Method and system for converting data formats using a shared cache coupled between clients and an external memory David B. Glasco, Peter B. Holmqvist, George R. Lynch, Karan Mehra, James Roberts 2012-09-18 $10,312,000
8244984 System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy David B. Glasco, Peter B. Holmqvist, George R. Lynch, James Roberts, John H. Edmondson 2012-08-14 $7,609,000