Issued Patents All Time
Showing 126–150 of 471 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7471101 | Systems and methods for controlling of electro-migration | Hayden C. Cranford, Jr., James S. Mason, Chih-Chao Yang | 2008-12-30 |
| 7460003 | Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer | Jack A. Mandelman, William R. Tonti, Chih-Chao Yang | 2008-12-02 |
| 7447273 | Redundancy structure and method for high-speed serial link | Carl Radens, Li-Kong Wang | 2008-11-04 |
| 7442579 | Methods to achieve precision alignment for wafer scale packages | Howard H. Chen | 2008-10-28 |
| 7439108 | Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same | Jack A. Mandelman | 2008-10-21 |
| 7412211 | Method for implementing enhanced hand shake protocol in microelectronic communication systems | Jack A. Mandelman, James S. Mason | 2008-08-12 |
| 7408374 | Systems and methods for controlling of electro-migration | Hayden C. Cranford, Jr., James S. Mason, Chih-Chao Yang | 2008-08-05 |
| 7408269 | Multi-level power supply system for a complementary metal oxide semiconductor circuit | Rajiv V. Joshi | 2008-08-05 |
| 7405982 | Methods to improve the operation of SOI devices | Roy C. Flaker, Jente B. Kuang | 2008-07-29 |
| 7405108 | Methods for forming co-planar wafer-scale chip packages | Lloyd Burrell, Howard H. Chen, Wolfgang Sauter | 2008-07-29 |
| 7404113 | Flexible row redundancy system | Gregory J. Fredeman, Rajiv V. Joshi, Toshiaki Kirihata | 2008-07-22 |
| 7399686 | Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate | Howard H. Chen, Jack A. Mandelman | 2008-07-15 |
| 7397261 | Monitoring system for detecting and characterizing classes of leakage in CMOS devices | Edward R. Pillai, Joseph Natonio, James D. Rockrohr, David R. Hanson | 2008-07-08 |
| 7396762 | Interconnect structures with linear repair layers and methods for forming such interconnection structures | Jack A. Mandelman, William R. Tonti, Chih-Chao Yang | 2008-07-08 |
| 7394283 | CML to CMOS signal converter | Gautam Gangasani, Michael A. Sorna, Steven J. Zier | 2008-07-01 |
| 7394273 | On-chip electromigration monitoring system | Hayden C. Cranford, Jr., Oleg Gluschenkov, James S. Mason, Michael A. Sorna, Chih-Chao Yang | 2008-07-01 |
| 7393730 | Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same | Jack A. Mandelman | 2008-07-01 |
| 7384838 | Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures | Jack A. Mandelman | 2008-06-10 |
| 7381594 | CMOS compatible shallow-trench efuse structure and method | Jack A. Mandelman, William R. Tonti, Chih-Chao Yang | 2008-06-03 |
| 7378853 | System and method for detecting cable faults for high-speed transmission link | Harry I. Linzer, James D. Rockrohr, Huihao Xu | 2008-05-27 |
| 7369410 | Apparatuses for dissipating heat from semiconductor devices | Howard H. Chen, Hsichang Liu, Lawrence S. Mok | 2008-05-06 |
| 7365001 | Interconnect structures and methods of making thereof | Chih-Chao Yang, Keith Kwong Hon Wong, Timothy J. Dalton, Carl Radens, Larry Clevenger | 2008-04-29 |
| 7358164 | Crystal imprinting methods for fabricating substrates with thin active silicon layers | Jack A. Mandelman, William R. Tonti | 2008-04-15 |
| 7355872 | Segmented content addressable memory architecture for improved cycle time and reduced power consumption | Brian L. Ji, Li-Kong Wang | 2008-04-08 |
| 7348648 | Interconnect structure with a barrier-redundancy feature | Chih-Chao Yang | 2008-03-25 |