Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12210058 | Clock gating for power reduction during testing | Sreekanth G. Pai, Harish Mundrathi, Santosh Kumar Surendra | 2025-01-28 |
| 8255846 | Development tool for comparing netlists | William A. Binder, Llewellyn Bradley Marshall, IV, William Rose | 2012-08-28 |
| 7710800 | Managing redundant memory in a voltage island | Michael R. Ouellette | 2010-05-04 |
| 7685484 | Methods for the support of JTAG for source synchronous interfaces | — | 2010-03-23 |
| 7378853 | System and method for detecting cable faults for high-speed transmission link | Louis L. Hsu, James D. Rockrohr, Huihao Xu | 2008-05-27 |
| 5809293 | System and method for program execution tracing within an integrated processor | Jeffrey Todd Bridges, Thomas Kevin Collopy, James Norris Dieffenderfer, Thomas Joseph Irene, Thomas Andrew Sartorius | 1998-09-15 |
| 5724572 | Method and apparatus for processing null terminated character strings | James Norris Dieffenderfer, Thomas Andrew Sartorius | 1998-03-03 |
| 5421000 | Memory subsystem having a static row memory and a dynamic RAM | Ronald N. Fortino, Kim E. O'Donnell | 1995-05-30 |
| 5371872 | Method and apparatus for controlling operation of a cache memory during an interrupt | Larry D. Larsen, David W. Nuechterlein, Kim E. O'Donnell, Lee S. Rogers, Thomas Andrew Sartorius +1 more | 1994-12-06 |