Issued Patents All Time
Showing 126–137 of 137 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6200894 | Method for enhancing aluminum interconnect properties | Thomas J. Licata, Katsuya Okumura | 2001-03-13 |
| 6110819 | Interconnect structure using Al.sub.2 Cu for an integrated circuit chip | Evan G. Colgan, Paul A. Totta, James F. White | 2000-08-29 |
| 6037795 | Multiple device test layout | Ronald G. Filippi, James J. Poulin, Robert D. Raviart, Richard G. Smith, Timothy D. Sullivan +1 more | 2000-03-14 |
| 5943601 | Process for fabricating a metallization structure | Takamasa Usui, Patrick W. DeHaven, Ronald G. Filippi, Chi-Hua Yang, Tomio Katata +1 more | 1999-08-24 |
| 5925933 | Interconnect structure using Al.sub.2 -Cu for an integrated circuit chip | Evan G. Colgan, Paul A. Totta, James F. White | 1999-07-20 |
| 5912506 | Multi-layer metal sandwich with taper and reduced etch bias and method for forming same | Evan G. Colgan, Peter M. Fryer, James M. E. Harper | 1999-06-15 |
| 5565707 | Interconnect structure using a Al.sub.2 Cu for an integrated circuit chip | Evan G. Colgan, Paul A. Totta, James F. White | 1996-10-15 |
| 5563517 | Dual channel d.c. low noise measurement system and test methodology | Glenn A. Biery, Daniel M. Boyne, Richard G. Smith, Michael H. Wood | 1996-10-08 |
| 5434385 | Dual channel D.C. low noise measurement system and test methodology | Glenn A. Biery, Daniel M. Boyne, Richard G. Smith, Michael H. Wood | 1995-07-18 |
| 5171642 | Multilayered intermetallic connection for semiconductor devices | Patrick W. DeHaven, J. Daniel Mis, Paul A. Totta, James F. White | 1992-12-15 |
| 5071714 | Multilayered intermetallic connection for semiconductor devices | Paul A. Totta, James F. White | 1991-12-10 |
| 4954142 | Method of chemical-mechanical polishing an electronic component substrate and polishing slurry therefor | Jeffrey Carr, Lawrence D. David, William L. Guthrie, Frank B. Kaufman, William J. Patrick +2 more | 1990-09-04 |