Issued Patents All Time
Showing 51–75 of 122 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10014047 | Memory module supporting time-division memory access | Frederick A. Ware, John Eric Linstadt | 2018-07-03 |
| 9997233 | Memory module with dynamic stripe width | Frederick A. Ware, John Eric Linstadt | 2018-06-12 |
| 9858208 | System for securing contents of removable memory | Brian J. Connolly, Joab D. Henderson, Jeffrey A. Sabrowski, Saravanan Sethuraman | 2018-01-02 |
| 9720703 | Data driven hardware chips initialization via hardware procedure framework | Kevin F. Reick, David D. Sanner | 2017-08-01 |
| 9720704 | Data driven hardware chips initialization via hardware procedure framework | Kevin F. Reick, David D. Sanner | 2017-08-01 |
| 9697884 | Variable width memory module supporting enhanced error detection and correction | Frederick A. Ware, John Eric Linstadt | 2017-07-04 |
| 9665115 | Reconfigurable power distribution system for three-dimensional integrated circuits | Vijay Anand Mathiyalagan, Siva Rama K. Pullelli, Saravanan Sethuraman | 2017-05-30 |
| 9575671 | Read distribution in a three-dimensional stacked memory based on thermal profiles | Diyanesh B. Chinnakkonda Vidyapoornachary, Saravanan Sethuraman | 2017-02-21 |
| 9568986 | System-wide power conservation using memory cache | Malcolm S. Allen-Ware, John Steven Dodson, Jordan R. Keuseman, Karthick Rajamani, Srinivasan Ramani +2 more | 2017-02-14 |
| 9519480 | Branch target preloading using a multiplexer and hash circuit to reduce incorrect branch predictions | Gregory W. Alexander, Anton Blanchard, Milton Devon Miller, II, Todd A. Venton | 2016-12-13 |
| 9477550 | ECC bypass using low latency CE correction with retry select signal | Benjiman L. Goodman, Luis A. Lastras-Montano, Eric E. Retter | 2016-10-25 |
| 9436548 | ECC bypass using low latency CE correction with retry select signal | Benjiman L. Goodman, Luis A. Lastras-Montano, Eric E. Retter | 2016-09-06 |
| 9405468 | Stacked memory device control | Venkatraghavan Bringivijayaraghavan, Saurabh Chadha, Abhijit Saurabh, Saravanan Sethuraman | 2016-08-02 |
| 9400602 | Stacked memory device control | Venkatraghavan Bringivijayaraghavan, Saurabh Chadha, Abhijit Saurabh, Saravanan Sethuraman | 2016-07-26 |
| 9389974 | Data retrieval from stacked computer memory | Saurabh Chadha, Hillery C. Hunter, Kyu-hyoun Kim, Abhijit Saurabh, Saravanan Sethuraman | 2016-07-12 |
| 9389972 | Data retrieval from stacked computer memory | Saurabh Chadha, Hillery C. Hunter, Kyu-hyoun Kim, Abhijit Saurabh, Saravanan Sethuraman | 2016-07-12 |
| 9378104 | Mirroring in three-dimensional stacked memory | Diyanesh B. Chinnakkonda Vidyapoornachary, Saravanan Sethuraman | 2016-06-28 |
| 9361195 | Mirroring in three-dimensional stacked memory | Diyanesh B. Chinnakkonda Vidyapoornachary, Saravanan Sethuraman | 2016-06-07 |
| 9325534 | Configurable differential to single ended IO | Frank D. Ferraiolo, Kevin C. Gower, Robert B. Tremaine | 2016-04-26 |
| 9298201 | Power delivery to three-dimensional chips | Vijay Anand Mathiyalagan, Siva Rama K. Pullelli, Saravanan Sethuraman | 2016-03-29 |
| 9189327 | Error-correcting code distribution for memory systems | Paul W. Coteus, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Warren E. Maule | 2015-11-17 |
| 9170639 | Method and apparatus for mitigating effects of memory scrub operations on idle time power savings modes | Joab D. Henderson, Richard Nicholas, Stephen J. Powell | 2015-10-27 |
| 9164572 | Method and apparatus for mitigating effects of memory scrub operations on idle time power savings mode | Joab D. Henderson, Richard Nicolas, Stephen J. Powell | 2015-10-20 |
| 9128834 | Implementing memory module communications with a host processor in multiported memory configurations | John Steven Dodson, Luis A. Lastras-Montano, Warren E. Maule, Adam J. McPadden | 2015-09-08 |
| 9111017 | Personal information system | Christopher M. Duma, Chet La Guardia | 2015-08-18 |