Issued Patents All Time
Showing 101–122 of 122 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7734877 | Method and data processing system for processor-to-processor communication in a clustered multi-processor system | Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek E. Williams | 2010-06-08 |
| 7698373 | Method, processing unit and data processing system for microprocessor communication in a multi-processor system | Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek E. Williams | 2010-04-13 |
| 7493417 | Method and data processing system for microprocessor communication using a processor interconnect in a multi-processor system | Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek E. Williams | 2009-02-17 |
| 7487397 | Method for cache correction using functional tests translated to fuse repair | Walter R. Lockwood, Ryan J. Pennington, Hugh Shen | 2009-02-03 |
| 7409504 | Chained cache coherency states for sequential non-homogeneous access to a cache line with outstanding data response | Ramakrishnan Rajamony, Hazim Shafi, Derek E. Williams | 2008-08-05 |
| 7370155 | Chained cache coherency states for sequential homogeneous access to a cache line with outstanding data response | Ramakrishnan Rajamony, Hazim Shafi, Derek E. Williams | 2008-05-06 |
| 7360067 | Method and data processing system for microprocessor communication in a cluster-based multi-processor wireless network | Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek E. Williams | 2008-04-15 |
| 7359932 | Method and data processing system for microprocessor communication in a cluster-based multi-processor system | Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek E. Williams | 2008-04-15 |
| 7356568 | Method, processing unit and data processing system for microprocessor communication in a multi-processor system | Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek E. Williams | 2008-04-08 |
| 7284097 | Modified-invalid cache state to reduce cache-to-cache data transfer operations for speculatively-issued full cache line writes | John Steven Dodson, James Stephen Fields, Jr., Guy L. Guthrie | 2007-10-16 |
| 7243194 | Method to preserve ordering of read and write operations in a DMA system by delaying read access | George William Daly, James Stephen Fields, Jr., Paul Umbarger | 2007-07-10 |
| 7194587 | Localized cache block flush instruction | John McCalpin, Balaram Sinharoy, Dereck Edward Williams | 2007-03-20 |
| 7017024 | Data processing system having no system memory | Ravi Kumar Arimilli, John Steven Dodson, Sanjeev Ghai | 2006-03-21 |
| 6934825 | Bi-directional stack in a linear memory array | Steven Farago, Robert James Ramirez | 2005-08-23 |
| 6920521 | Method and system of managing virtualized physical memory in a data processing system | Ravi Kumar Arimilli, John Steven Dodson, Sanjeev Ghai | 2005-07-19 |
| 6907494 | Method and system of managing virtualized physical memory in a memory controller and processor system | Ravi Kumar Arimilli, John Steven Dodson, Sanjeev Ghai | 2005-06-14 |
| 6904490 | Method and system of managing virtualized physical memory in a multi-processor system | Ravi Kumar Arimilli, John Steven Dodson, Sanjeev Ghai | 2005-06-07 |
| 6795878 | Verifying cumulative ordering of memory instructions | Aaron C. Brown, Steven Farago, Robert James Ramirez | 2004-09-21 |
| 6785773 | Verification of global coherence in a multi-node NUMA system | Steven Farago, Liang-Haw Leu, Lawrence Allyn McConville | 2004-08-31 |
| 6643662 | Split bi-directional stack in a linear memory array | Steven Farago | 2003-11-04 |
| 6629228 | Proportionally growing stack in a linear memory array | Steven Farago | 2003-09-30 |
| 6473772 | Apparatus and methods for dynamic simulation event triggering | Archie D. Barrett, Jr., Jason R. Baumgartner, Sriram Mandyam, Robert James Ramirez, Brett Adam St. Onge | 2002-10-29 |