Issued Patents All Time
Showing 1–25 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11176010 | Circuit-cycle reproduction | Daniel Lewis, Sean Dalton | 2021-11-16 |
| 11119890 | Instruction level tracing for analyzing processor failure | Saurabh Chadha, Daniel Lewis | 2021-09-14 |
| 11036406 | Thermally aware memory management | Girisankar Paulraj, Daniel Lewis, Sumantra Sarkar, Arindam Raychaudhuri | 2021-06-15 |
| 10997029 | Core repair with failure analysis and recovery probe | Rocio Yolanda Garza, Tony E. Sawan, Saurabh Chadha | 2021-05-04 |
| 10983832 | Managing heterogeneous memory resource within a computing system | Nagendra K. Gurram, Saravanan Sethuraman, Edgar R. Cordero, Anuwat Saetow | 2021-04-20 |
| 10902887 | Memory subsystem power management | Anil B. Lingambudi, Arindam Raychaudhuri | 2021-01-26 |
| 10884055 | Leakage power characterization at high temperatures for an integrated circuit | Anand Haridass, Arun Joseph, Charles R. Lefurgy, Spandana V. Rachamalla | 2021-01-05 |
| 10762979 | Data retention in storage drives | Arindam Raychaudhuri | 2020-09-01 |
| 10740177 | Optimizing error correcting code in three-dimensional stacked memory | Saravanan Sethuraman, Sridhar H. Rangarajan, Kirk D. Peterson, John Bradley Deforge | 2020-08-11 |
| 10725678 | Power management for memory subsystems | Arindam Raychaudhuri, Anil B. Lingambudi, Sridhar H. Rangarajan | 2020-07-28 |
| 10628248 | Autonomous dram scrub and error counting | Marc A. Gollub, Warren E. Maule, Tony E. Sawan | 2020-04-21 |
| 10545824 | Selective error coding | Timothy J. Dell, Marc A. Gollub, Anil B. Lingambudi | 2020-01-28 |
| 10534545 | Three-dimensional stacked memory optimizations for latency and power | John Bradley Deforge, Warren E. Maule, Kirk D. Peterson, Sridhar H. Rangarajan, Saravanan Sethuraman | 2020-01-14 |
| 10528288 | Three-dimensional stacked memory access optimization | John Bradley Deforge, Warren E. Maule, Kirk D. Peterson, Sridhar H. Rangarajan, Saravanan Sethuraman | 2020-01-07 |
| 10452470 | In-channel memory mirroring | Saravanan Sethuraman | 2019-10-22 |
| 10446255 | Reference voltage calibration in memory during runtime | Edgar R. Cordero, Stephen P. Glancy, Jeremy R. Neaton, Saravanan Sethuraman | 2019-10-15 |
| 10326773 | Ensuring the credibility of devices for global attestation | Saritha Arunkumar, Douglas J. Cowie, Farheen Munshi, Saravanan Sethuraman | 2019-06-18 |
| 10304501 | Implementing DRAM refresh power optimization during long idle mode | Michael D. Pardeik, Edgar R. Cordero, Arindam Raychaudhuri | 2019-05-28 |
| 10255986 | Assessing in-field reliability of computer memories | Kyu-hyoun Kim, Anil B. Lingambudi, Adam J. McPadden | 2019-04-09 |
| 10248502 | Correcting an error in a memory device | Vijay Anand Mathiyalagan, Gary A. Tressler | 2019-04-02 |
| 10228999 | Memory scrubbing in a mirrored memory system to reduce system power consumption | Marc A. Gollub, Tony E. Sawan | 2019-03-12 |
| 10223200 | Memory scrubbing in a mirrored memory system to reduce system power consumption | Marc A. Gollub, Tony E. Sawan | 2019-03-05 |
| 10218713 | Global attestation procedure | Saritha Arunkumar, Saravanan Sethuraman | 2019-02-26 |
| 10168936 | Memory system power management | Marc A. Gollub, Tony E. Sawan | 2019-01-01 |
| 10140186 | Memory error recovery | Marc A. Gollub, Brad W. Michael, Tony E. Sawan | 2018-11-27 |