Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11698842 | Efficient and selective sparing of bits in memory systems | Kyu-hyoun Kim, Warren E. Maule, Kevin M. Mcilvain | 2023-07-11 |
| 11593196 | Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channel | Kevin M. Mcilvain, Warren E. Maule, Kyu-hyoun Kim, Edgar R. Cordero | 2023-02-28 |
| 11200112 | Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channel | Kevin M. Mcilvain, Warren E. Maule, Kyu-hyoun Kim, Edgar R. Cordero | 2021-12-14 |
| 11182262 | Efficient and selective sparing of bits in memory systems | Kyu-hyoun Kim, Warren E. Maule, Kevin M. Mcilvain | 2021-11-23 |
| 10936222 | Hardware abstraction in software or firmware for hardware calibration | Anuwat Saetow | 2021-03-02 |
| 10671497 | Efficient and selective sparing of bits in memory systems | Kyu-hyoun Kim, Warren E. Maule, Kevin M. Mcilvain | 2020-06-02 |
| 10606696 | Internally-generated data storage in spare memory locations | David D. Cadigan, Frank LaPietra, Kevin M. Mcilvain, Jeremy R. Neaton, Richard D. Wheeler | 2020-03-31 |
| 10585672 | Memory device command-address-control calibration | David D. Cadigan, William V. Huott, Kyu-hyoun Kim, Adam J. McPadden, Anuwat Saetow +1 more | 2020-03-10 |
| 10580476 | Simulating a single data rate (SDR) mode on a dual data rate (DDR) memory controller for calibrating DDR memory coarse alignment | Ryan Patrick King, John S. Bialas, Jr. | 2020-03-03 |
| 10446255 | Reference voltage calibration in memory during runtime | Diyanesh B. Chinnakkonda Vidyapoornachary, Edgar R. Cordero, Jeremy R. Neaton, Saravanan Sethuraman | 2019-10-15 |
| 10289578 | Per-DRAM and per-buffer addressability shadow registers and write-back functionality | John S. Bialas, Jr. | 2019-05-14 |
| 10261856 | Bitwise sparing in a memory system | Frank LaPietra, Kevin M. Mcilvain, Jeremy R. Neaton, Richard D. Wheeler | 2019-04-16 |
| 10134455 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Warren E. Maule, Gary A. Van Huben | 2018-11-20 |
| 10126968 | Efficient configuration of memory components | John S. Bialas, Jr., Saravanan Sethuraman, Jacob Sloat | 2018-11-13 |
| 10090065 | Simultaneous write, read, and command-address-control calibration of an interface within a circuit | Jeremy R. Neaton, Gary A. Van Huben | 2018-10-02 |
| 10068634 | Simultaneous write and read calibration of an interface within a circuit | Gary A. Van Huben | 2018-09-04 |
| 9940417 | Simulating reference voltage response in digital simulation environments | John S. Bialas, Jr., Siva Pr. Boosa, Yelena M. Tsyrkina | 2018-04-10 |
| 9899067 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Warren E. Maule, Gary A. Van Huben | 2018-02-20 |
| 9760504 | Nonvolatile memory data security | Diyanesh B. Chinnakkonda Vidyapoornachary, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Warren E. Maule +1 more | 2017-09-12 |
| 9753806 | Implementing signal integrity fail recovery and mainline calibration for DRAM | Jeremy R. Neaton, Anuwat Saetow, Jacob Sloat | 2017-09-05 |
| 9734095 | Nonvolatile memory data security | Diyanesh B. Chinnakkonda Vidyapoornachary, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Warren E. Maule +1 more | 2017-08-15 |
| 9691453 | Efficient calibration of memory devices | John S. Bialas, Jr., David D. Cadigan, Warren E. Maule, Gary A. Van Huben | 2017-06-27 |
| 9627030 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Warren E. Maule, Gary A. Van Huben | 2017-04-18 |
| 9620184 | Efficient calibration of memory devices | John S. Bialas, Jr., David D. Cadigan, Warren E. Maule, Gary A. Van Huben | 2017-04-11 |
| 9558850 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Warren E. Maule, Gary A. Van Huben | 2017-01-31 |