Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11698842 | Efficient and selective sparing of bits in memory systems | Stephen P. Glancy, Kyu-hyoun Kim, Warren E. Maule | 2023-07-11 |
| 11593196 | Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channel | Warren E. Maule, Stephen P. Glancy, Kyu-hyoun Kim, Edgar R. Cordero | 2023-02-28 |
| 11442829 | Packeted protocol device test system | Ryan Patrick King, Gary A. Van Huben | 2022-09-13 |
| 11200112 | Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channel | Warren E. Maule, Stephen P. Glancy, Kyu-hyoun Kim, Edgar R. Cordero | 2021-12-14 |
| 11182262 | Efficient and selective sparing of bits in memory systems | Stephen P. Glancy, Kyu-hyoun Kim, Warren E. Maule | 2021-11-23 |
| 11119676 | Using spare bits in memory systems | Krishna Thangaraj, David D. Cadigan | 2021-09-14 |
| 11037619 | Using dual channel memory as single channel memory with spares | Kyu-hyoun Kim, Warren E. Maule, Saravanan Sethuraman | 2021-06-15 |
| 10671497 | Efficient and selective sparing of bits in memory systems | Stephen P. Glancy, Kyu-hyoun Kim, Warren E. Maule | 2020-06-02 |
| 10642504 | Thermal and power memory actions | Briana E. Foxworth, Saravanan Sethuraman, Lucas W. Mulkey, Adam J. McPadden | 2020-05-05 |
| 10606696 | Internally-generated data storage in spare memory locations | David D. Cadigan, Stephen P. Glancy, Frank LaPietra, Jeremy R. Neaton, Richard D. Wheeler | 2020-03-31 |
| 10606713 | Using dual channel memory as single channel memory with command address recovery | Kyu-hyoun Kim, Warren E. Maule, Saravanan Sethuraman | 2020-03-31 |
| 10585754 | Memory security protocol | Briana E. Foxworth, Saravanan Sethuraman, Lucas W. Mulkey, Adam J. McPadden | 2020-03-10 |
| 10546628 | Using dual channel memory as single channel memory with spares | Kyu-hyoun Kim, Warren E. Maule, Saravanan Sethuraman | 2020-01-28 |
| 10394618 | Thermal and power memory actions | Briana E. Foxworth, Saravanan Sethuraman, Lucas W. Mulkey, Adam J. McPadden | 2019-08-27 |
| 10353455 | Power management in multi-channel 3D stacked DRAM | Saravanan Sethuraman, Warren E. Maule, Kyu-hyoun Kim | 2019-07-16 |
| 10338815 | Multi-channel nonvolatile memory power loss management | Kyu-hyoun Kim, Adam J. McPadden, Nandita A. Mitra | 2019-07-02 |
| 10281974 | Power management in multi-channel 3D stacked DRAM | Saravanan Sethuraman, Warren E. Maule, Kyu-hyoun Kim | 2019-05-07 |
| 10261856 | Bitwise sparing in a memory system | Stephen P. Glancy, Frank LaPietra, Jeremy R. Neaton, Richard D. Wheeler | 2019-04-16 |
| 10198300 | Thermal and power memory actions | Briana E. Foxworth, Saravanan Sethuraman, Lucas W. Mulkey, Adam J. McPadden | 2019-02-05 |
| 10168905 | Multi-channel nonvolatile memory power loss management | Kyu-hyoun Kim, Adam J. McPadden, Nandita A. Mitra | 2019-01-01 |
| 10127100 | Correcting a data storage error caused by a broken conductor using bit inversion | Edgar R. Cordero, Briana E. Foxworth, Andre A. Marin, Lucas W. Mulkey, Anuwat Saetow | 2018-11-13 |
| 10042726 | Data buffer spare architectures for dual channel serial interface memories | Kyu-hyoun Kim, Warren E. Maule, Saravanan Sethuraman | 2018-08-07 |
| 9904611 | Data buffer spare architectures for dual channel serial interface memories | Kyu-hyoun Kim, Warren E. Maule, Saravanan Sethuraman | 2018-02-27 |
| 9740267 | Adjusting power management controls of a memory based on traffic | Edgar R. Cordero, Briana E. Foxworth, Lucas W. Mulkey, Feihong Yan | 2017-08-22 |
| 9384108 | Functional built-in self test for a chip | Robert B. Tremaine, Gary A. Van Huben | 2016-07-05 |