Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10096353 | System and memory controller for interruptible memory refresh | Edgar R. Cordero, Carlos A. Fernandez, Joab D. Henderson, William Paul Hovis, Anuwat Saetow +1 more | 2018-10-09 |
| 10067886 | System for securing contents of removable memory | Brian J. Connolly, Joab D. Henderson, Saravanan Sethuraman, Kenneth L. Wright | 2018-09-04 |
| 9972376 | Memory device for interruptible memory refresh | Edgar R. Cordero, Carlos A. Fernandez, Joab D. Henderson, William Paul Hovis, Anuwat Saetow +1 more | 2018-05-15 |
| 9858208 | System for securing contents of removable memory | Brian J. Connolly, Joab D. Henderson, Saravanan Sethuraman, Kenneth L. Wright | 2018-01-02 |
| 9535784 | Self monitoring and self repairing ECC | Edgar R. Cordero, Timothy J. Dell, Joab D. Henderson, Anuwat Saetow, Saravanan Sethuraman | 2017-01-03 |
| 9418722 | Prioritizing refreshes in a memory device | Edgar R. Cordero, Joab D. Henderson, Kyu-hyoun Kim, Anuwat Saetow | 2016-08-16 |
| 9349432 | Reference voltage modification in a memory device | Edgar R. Cordero, Joab D. Henderson, Kyu-hyoun Kim, Anuwat Saetow | 2016-05-24 |
| 9348744 | Implementing enhanced reliability of systems utilizing dual port DRAM | Edgar R. Cordero, Carlos A. Fernandez, Joab D. Henderson, Anuwat Saetow, Saravanan Sethuraman | 2016-05-24 |
| 9305618 | Implementing simultaneous read and write operations utilizing dual port DRAM | Edgar R. Cordero, Carlos A. Fernandez, Joab D. Henderson, Anuwat Saetow, Saravanan Sethuraman | 2016-04-05 |
| 9305619 | Implementing simultaneous read and write operations utilizing dual port DRAM | Edgar R. Cordero, Carlos A. Fernandez, Joab D. Henderson, Anuwat Saetow, Saravanan Sethuraman | 2016-04-05 |
| 9251054 | Implementing enhanced reliability of systems utilizing dual port DRAM | Edgar R. Cordero, Carlos A. Fernandez, Joab D. Henderson, Anuwat Saetow, Saravanan Sethuraman | 2016-02-02 |
| 9245604 | Prioritizing refreshes in a memory device | Edgar R. Cordero, Joab D. Henderson, Kyu-hyoun Kim, Anuwat Saetow | 2016-01-26 |
| 9230687 | Implementing ECC redundancy using reconfigurable logic blocks | Edgar R. Cordero, Timothy J. Dell, Joab D. Henderson, Anuwat Saetow, Saravanan Sethuraman | 2016-01-05 |
| 9224450 | Reference voltage modification in a memory device | Edgar R. Cordero, Joab D. Henderson, Kyu-hyoun Kim, Anuwat Saetow | 2015-12-29 |
| 9063902 | Implementing enhanced hardware assisted DRAM repair using a data register for DRAM repair selectively provided in a DRAM module | Edgar R. Cordero, Joab D. Henderson, Divya Kumar, Anuwat Saetow | 2015-06-23 |
| 8996953 | Self monitoring and self repairing ECC | Edgar R. Cordero, Timothy J. Dell, Joab D. Henderson, Anuwat Saetow, Saravanan Sethuraman | 2015-03-31 |
| 8930776 | Implementing DRAM command timing adjustments to alleviate DRAM failures | Edgar R. Cordero, Joab D. Henderson, Divya Kumar, Anuwat Saetow | 2015-01-06 |