JM

Jose E. Moreira

IBM: 79 patents #863 of 70,183Top 2%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
📍 Dobbs Ferry, NY: #3 of 324 inventorsTop 1%
🗺 New York: #836 of 115,490 inventorsTop 1%
Overall (All Time): #22,091 of 4,157,543Top 1%
81
Patents All Time

Issued Patents All Time

Showing 51–75 of 81 patents

Patent #TitleCo-InventorsDate
9626187 Transactional memory system supporting unbroken suspended execution Harold W. Cain, III, Bradly G. Frey, Benjamin Herrenschmidt, Hung Q. Le, Cathy May +4 more 2017-04-18
9619356 Detection of hardware errors using periodically synchronized redundant transactions and comparing results from cores of a multi-core processor Harold W. Cain, III, David M. Daly, Kattamuri Ekanadham, Michael C. Huang, Mauricio J. Serrano 2017-04-11
9582423 Counter-based wide fetch management Michael K. Gschwind 2017-02-28
9582424 Counter-based wide fetch management Michael K. Gschwind 2017-02-28
9524100 Page table including data fetch width indicator Michael K. Gschwind, Balaram Sinharoy 2016-12-20
9524166 Tracking long GHV in high performance out-of-order superscalar processors Richard J. Eickemeyer, Tejas Karkhanis, Brian R. Konigsburg, David S. Levitan, Douglas R. G. Logan +1 more 2016-12-20
9519479 Techniques for increasing vector processing utilization and efficiency through vector lane predication prediction Hung Q. Le, Pratap C. Pattnaik, Brian W. Thompto, Jessica Hui-Chun Tseng 2016-12-13
9513805 Page table including data fetch width indicator Michael K. Gschwind, Balaram Sinharoy 2016-12-06
9495164 Branch prediction using multiple versions of history data David S. Levitan, Mauricio J. Serrano 2016-11-15
9483179 Memory-area property storage including data fetch width indicator Michael K. Gschwind, Balaram Sinharoy 2016-11-01
9483180 Memory-area property storage including data fetch width indicator Michael K. Gschwind, Balaram Sinharoy 2016-11-01
9483271 Compressed indirect prediction caches Tejas Karkhanis, David S. Levitan, Mauricio J. Serrano 2016-11-01
9459979 Detection of hardware errors using redundant transactions for system test Harold W. Cain, III, David M. Daly, Kattamuri Ekanadham, Michael C. Huang, Mauricio J. Serrano 2016-10-04
9411735 Counter-based wide fetch management Michael K. Gschwind 2016-08-09
9400700 Optimized system for analytics (graphs and sparse matrices) operations Kattamuri Ekanadham, William P. Horn, Joefon Jann, Manoj Kumar, Pratap C. Pattnaik +3 more 2016-07-26
9400751 Counter-based wide fetch management Michael K. Gschwind 2016-07-26
9304835 Optimized system for analytics (graphs and sparse matrices) operations Kattamuri Ekanadham, William P. Horn, Joefon Jann, Manoj Kumar, Pratap C. Pattnaik +3 more 2016-04-05
9304863 Transactions for checkpointing and reverse execution Harold W. Cain, III, David M. Daly, Kattamuri Ekanadham, Mauricio J. Serrano 2016-04-05
9251014 Redundant transactions for detection of timing sensitive errors Harold W. Cain, III, David M. Daly, Michael C. Huang, Kattamuri Ekanadham, Mauricio J. Serrano 2016-02-02
8943299 Operating a stack of information in an information handling system Kattamuri Ekanadham, Brian R. Konigsburg, David S. Levitan, David Mui, Il Park 2015-01-27
8683175 Seamless interface for multi-threaded core accelerators Kattamuri Ekanadham, Hung Q. Le, Pratap C. Pattnaik 2014-03-25
8214560 Communications support in a transactional memory Patricia M. Sagmeister 2012-07-03
7895323 Hybrid event prediction and system control Manish Gupta, Adam Oliner, Ramendra K. Sahoo 2011-02-22
7721009 Method for providing high performance scalable file I/O through persistent file domain and functional partitioning Ramendra K. Sahoo, Hao Yu 2010-05-18
7577730 Semi-hierarchical system and method for administration of clusters of computer resources Myung M. Bae, Ramendra K. Sahoo 2009-08-18