Issued Patents All Time
Showing 101–125 of 440 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7491994 | Ferromagnetic memory cell and methods of making and using the same | Kangguo Cheng, Herbert L. Ho, Louis L. Hsu | 2009-02-17 |
| 7491618 | Methods and semiconductor structures for latch-up suppression using a conductive region | Toshiharu Furukawa, David V. Horak, Charles W. Koburger, III, William R. Tonti | 2009-02-17 |
| 7485525 | Method of manufacturing a multiple port memory having a plurality of parallel connected trench capacitors in a cell | Kangguo Cheng, Ramachandra Divakaruni, Carl Radens, Geng Wang | 2009-02-03 |
| 7482672 | Semiconductor device structures for bipolar junction transistors | Kangguo Cheng, Louis L. Hsu | 2009-01-27 |
| 7479437 | Method to reduce contact resistance on thin silicon-on-insulator device | Brian J. Greene, Louis L. Hsu, Chun-Yung Sung | 2009-01-20 |
| 7477541 | Memory elements and methods of using the same | Wagdi W. Abadeer, Anthony R. Bonaccio, William R. Tonti, Sebastian T. Ventrone | 2009-01-13 |
| 7473985 | Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates | Louis L. Hsu, William R. Tonti | 2009-01-06 |
| 7470929 | Fuse/anti-fuse structure and methods of making and programming same | Louis C. Hsu, Rajiv V. Joshi, Chih-Chao Yang | 2008-12-30 |
| 7465642 | Methods for forming semiconductor structures with buried isolation collars | Kangguo Cheng | 2008-12-16 |
| 7460003 | Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer | Louis L. Hsu, William R. Tonti, Chih-Chao Yang | 2008-12-02 |
| 7459743 | Dual port gain cell with side and top gated read transistor | Kangguo Cheng, Ramachandra Divakaruni, Carl Radens, Geng Wang | 2008-12-02 |
| 7442614 | Silicon on insulator devices having body-tied-to-source and methods of making | Thomas W. Dyer, Keith Kwong Hon Wong, Chih-Chao Yang, Haining Yang | 2008-10-28 |
| 7439128 | Method of creating deep trench capacitor using a P+ metal electrode | Ramachandra Divakaruni, Dae-Gyu Park | 2008-10-21 |
| 7439108 | Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same | Louis L. Hsu | 2008-10-21 |
| 7427545 | Trench memory cells with buried isolation collars, and methods of fabricating same | Kangguo Cheng | 2008-09-23 |
| 7417300 | Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabrication thereof | Roger A. Booth, Jr., William R. Tonti | 2008-08-26 |
| 7412211 | Method for implementing enhanced hand shake protocol in microelectronic communication systems | Louis L. Hsu, James S. Mason | 2008-08-12 |
| 7399686 | Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate | Howard H. Chen, Louis L. Hsu | 2008-07-15 |
| 7397692 | High performance single event upset hardened SRAM cell | Ethan H. Cannon, Toshiharu Furukawa, David V. Horak, Charles W. Koburger, III | 2008-07-08 |
| 7396762 | Interconnect structures with linear repair layers and methods for forming such interconnection structures | Louis L. Hsu, William R. Tonti, Chih-Chao Yang | 2008-07-08 |
| 7393730 | Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same | Louis L. Hsu | 2008-07-01 |
| 7390730 | Method of fabricating a body capacitor for SOI memory | Louis C. Hsu, Rajiv V. Joshi | 2008-06-24 |
| 7384838 | Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures | Louis L. Hsu | 2008-06-10 |
| 7381594 | CMOS compatible shallow-trench efuse structure and method | Louis L. Hsu, William R. Tonti, Chih-Chao Yang | 2008-06-03 |
| 7368787 | Fin field effect transistors (FinFETs) and methods for making the same | William Paul Hovis | 2008-05-06 |