Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6555166 | Method for reducing the microloading effect in a chemical vapor deposition reactor | Oleg Gluschenkov | 2003-04-29 |
| 6528383 | Simultaneous formation of deep trench capacitor and resistor | Satya N. Chakravarti, Irene McStay, Kwong Hon Wong | 2003-03-04 |
| 6500772 | Methods and materials for depositing films on semiconductor substrates | Richard A. Conti, Chester T. Dziobkowski, Thomas Ivers, Paul C. Jamison, Frank V. Liucci | 2002-12-31 |
| 6436760 | Method for reducing surface oxide in polysilicon processing | Kwong Hon Wong, Satya N. Chakravarti, Subramanian S. Iyer | 2002-08-20 |
| 6429149 | Low temperature LPCVD PSG/BPSG process | Richard A. Conti, Laertis Economikos, Byeongju Park | 2002-08-06 |
| 6204112 | Process for forming a high density semiconductor device | Satya N. Chakravarti, James G. Ryan | 2001-03-20 |
| 6159870 | Borophosphosilicate glass incorporated with fluorine for low thermal budget gap fill | Richard A. Conti, Frank V. Liucci, Darryl D. Restaino | 2000-12-12 |
| 6077786 | Methods and apparatus for filling high aspect ratio structures with silicate glass | Richard A. Conti, Donna R. Cote, Frank V. Liucci, Son V. Nguyen | 2000-06-20 |
| 6057250 | Low temperature reflow dielectric-fluorinated BPSG | Markus Kirchhoff, Matthias Ilg, Kevin A. McKinley, Son V. Nguyen, Michael J. Shapiro | 2000-05-02 |
| 6030881 | High throughput chemical vapor deposition process capable of filling high aspect ratio structures | George D. Papasouliotis, Richard A. Conti, Laertis Economikos, Patrick A. Van Cleemput | 2000-02-29 |
| 5909044 | Process for forming a high density semiconductor device | Satya N. Chakravarti, James G. Ryan | 1999-06-01 |
| 5643640 | Fluorine doped plasma enhanced phospho-silicate glass, and process | Terry M. Cheng, Son Van Nguyen, Michael J. Shapiro | 1997-07-01 |