ST

Shigeya Tanaka

HI Hitachi: 34 patents #717 of 28,497Top 3%
HH Hitachi High-Technologies: 7 patents #452 of 1,917Top 25%
RT Renesas Technology: 1 patents #1,991 of 3,337Top 60%
Overall (All Time): #72,973 of 4,157,543Top 2%
42
Patents All Time

Issued Patents All Time

Showing 1–25 of 42 patents

Patent #TitleCo-InventorsDate
11561184 Support system for specified inspection, support method for specified inspection, and non-transitory computer readable medium Nobuyoshi TADA, Minori Noguchi, Yuusuke OOMINAMI, Maya Goto 2023-01-24
9164042 Device for detecting foreign matter and method for detecting foreign matter Kenji Aiko, Yasuko Aoki, Hiroshi Kawaguchi, Kei Shimura 2015-10-20
7999565 Inspection apparatus and inspection method using electron beam Yasuhiro Gunji, Hiroshi Miyai 2011-08-16
7889911 Image processing unit for wafer inspection tool Michio Nakano, Yoshiyuki Momiyama, Takashi Hiroi, Kazuya Hayashi, Dai Fujii +3 more 2011-02-15
7521676 Method and apparatus for inspecting pattern defects and mirror electron projection type or multi-beam scanning type electron beam apparatus Hirohito Okuda, Takashi Hiroi, Masaki Hasegawa 2009-04-21
7518383 Inspection apparatus and inspection method using electron beam Yasuhiro Gunji, Hiroshi Miyai 2009-04-14
7424598 Data processor Takashi Hotta, Hideo Maejima 2008-09-09
7421110 Image processing unit for wafer inspection tool Michio Nakano, Yoshiyuki Momiyama, Takashi Hiroi, Kazuya Hayashi, Dai Fujii +3 more 2008-09-02
7240159 Data processor having cache memory Takashi Hotta, Toshihiko Kurihara, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito +1 more 2007-07-03
7111187 Information processor and information processing system utilizing interface for synchronizing clock signal Takashi Hotta, Kozaburo Kurita, Masahiro Iwamura, Hideo Maejima, Tadaaki Bandoh +3 more 2006-09-19
6848027 Data processor having cache memory Takashi Hotta, Toshihiko Kurihara, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito +1 more 2005-01-25
6675311 Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices Takashi Hotta, Kozaburo Kurita, Masahiro Iwamura, Hideo Maejima, Tadaaki Bandoh +3 more 2004-01-06
6671815 Low power consumption semiconductor integrated circuit device and microprocessor Masahiro Iwamura, Hideo Maejima, Tetsuo Nakano 2003-12-30
6587927 Data processor having cache memory Takashi Hotta, Toshihiko Kurihara, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito +1 more 2003-07-01
6467004 Pipelined semiconductor devices suitable for ultra large scale integration Masahiro Iwamura, Takashi Hotta, Tatsumi Yamauchi, Kazutaka Mori 2002-10-15
6275902 Data processor with variable types of cache memories and a controller for selecting a cache memory to be access Takashi Hotta, Toshihiko Kurihara, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito +1 more 2001-08-14
6256726 Data processor for the parallel processing of a plurality of instructions Takashi Hotta, Hideo Maejima 2001-07-03
6101596 Information processor for performing processing without register conflicts Kotaro Shimamura, Tetsuya Shimomura, Takashi Hotta, Hideo Sawamoto 2000-08-08
6088808 Low power consumption semiconductor integrated circuit device and microprocessor Masahiro Iwamura, Hideo Maejima, Tetsuo Nakano 2000-07-11
6032229 Semiconductor memory device and information processor using the same Takashi Hotta, Hideo Sawamoto, Noboru Akiyama, Takashi Akioka 2000-02-29
6029220 Pipelined semiconductor devices suitable for ultra large scale integration Masahiro Iwamura, Takashi Hotta, Tatsumi Yamauchi, Kazutaka Mori 2000-02-22
5974560 Information processor and information processing system utilizing clock signal Takashi Hotta, Kozaburo Kurita, Masahiro Iwamura, Hideo Maejima, Tadaaki Bandoh +3 more 1999-10-26
5968160 Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory Masahiko Saito, Kenichi Kurosawa, Yoshiki Kobayashi, Tadaaki Bandoh, Masahiro Iwamura +3 more 1999-10-19
5894582 Method of controlling parallel processing at an instruction level and processor for realizing the method Shoji Yoshida, Takashi Hotta 1999-04-13
5848432 Data processor with variable types of cache memories Takashi Hotta, Toshihiko Kurihara, Hideo Sawamoto, Akiyoshi Osumi, Koji Saito +1 more 1998-12-08