Issued Patents All Time
Showing 26–50 of 66 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9257325 | Semiconductor structures and methods for forming isolation between Fin structures of FinFET devices | Frank Scott Johnson | 2016-02-09 |
| 9245885 | Methods of forming lateral and vertical FinFET devices and the resulting product | Ruilong Xie | 2016-01-26 |
| 9147730 | Methods of forming fins for FinFET semiconductor devices and selectively removing some of the fins by performing a cyclical fin cutting process | Ruilong Xie, Ajey Poovannummoottil Jacob, Michael Hargrove | 2015-09-29 |
| 9147748 | Methods of forming replacement spacer structures on semiconductor devices | Ruilong Xie, Xiuyu Cai, Ajey Poovannummoottil Jacob, Christopher M. Prindle | 2015-09-29 |
| 9048171 | Method to dynamically tune precision resistance | Steven R. Soss | 2015-06-02 |
| 9000534 | Method for forming and integrating metal gate transistors having self-aligned contacts and related structure | Frank Scott Johnson | 2015-04-07 |
| 8779529 | Self-aligned silicidation for replacement gate process | Indradeep Sen, Thorsten Kammler, Akif Sultan | 2014-07-15 |
| 8729609 | Integrated circuits including multi-gate transistors locally interconnected by continuous fin structure and methods for the fabrication thereof | Frank Scott Johnson | 2014-05-20 |
| 8709882 | Method to dynamically tune precision resistance | Steven R. Soss | 2014-04-29 |
| 8533651 | Providing conversion of a planar design to a FinFET design | Soon Yoeng Tan, Angeline Ho, Hendry Renaldo, Scott Johnson | 2013-09-10 |
| 8361870 | Self-aligned silicidation for replacement gate process | Indradeep Sen, Thorsten Kammler, Akif Sultan | 2013-01-29 |
| 8048790 | Method for self-aligning a stop layer to a replacement gate for self-aligned contact integration | Steven R. Soss | 2011-11-01 |
| 8039326 | Methods for fabricating bulk FinFET devices having deep trench isolation | Frank Scott Johnson | 2011-10-18 |
| 7626257 | Semiconductor devices and methods of manufacture thereof | — | 2009-12-01 |
| 7601645 | Methods for fabricating device features having small dimensions | Doug H. Lee | 2009-10-13 |
| 7297636 | Methods for fabricating device features having small dimensions | Doug H. Lee | 2007-11-20 |
| 7273638 | High density plasma oxidation | Michael P. Belyansky, Oleg Glushenkov | 2007-09-25 |
| 7256148 | Method for treating a wafer edge | Bernd Kastenmeier | 2007-08-14 |
| 7157373 | Sidewall sealing of porous dielectric materials | Bernd Kastenmeier | 2007-01-02 |
| 7125782 | Air gaps between conductive lines for reduced RC delay of integrated circuits | Bernd Kastenmeier, Naim Moumen | 2006-10-24 |
| 7091103 | TEOS assisted oxide CMP process | Jochen Beintner, Laertis Economikos, Michael Wise | 2006-08-15 |
| 6946345 | Self-aligned buried strap process using doped HDP oxide | Jochen Beintner, Wolfgang Bergner, Richard A. Conti, Rolf Weis | 2005-09-20 |
| 6933206 | Trench isolation employing a high aspect ratio trench | Jochen Beintner | 2005-08-23 |
| 6914015 | HDP process for high aspect ratio gap filling | Michael P. Belyansky, Patricia Argandona, Gregory DiBello, Daewon Yang | 2005-07-05 |
| 6890833 | Trench isolation employing a doped oxide trench fill | Michael P. Belyansky, Oleg Gluschenkov, Christopher C. Parks | 2005-05-10 |