Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7241647 | Graded semiconductor layer | Mariam Sadaka, Shawn George Thomas, Chun-Li Liu, Alexander L. Barr, Bich-Yen Nguyen +1 more | 2007-07-10 |
| 7226833 | Semiconductor device structure and method therefor | Alexander L. Barr, Bich-Yen Nguyen, Marius Orlowski, Mariam Sadaka, Voon-Yew Thean | 2007-06-05 |
| 7226820 | Transistor fabrication using double etch/refill process | Da Zhang, Jing Liu, Bich-Yen Nguyen, Voon-Yew Thean | 2007-06-05 |
| 7208357 | Template layer formation | Mariam Sadaka, Alexander L. Barr, Bich-Yen Nguyen, Voon-Yew Thean | 2007-04-24 |
| 7205210 | Semiconductor structure having strained semiconductor and method therefor | Alexander L. Barr, Dejan Jovanovic, Bich-Yen Nguyen, Mariam Sadaka, Voon-Yew Thean | 2007-04-17 |
| 7163903 | Method for making a semiconductor structure using silicon germanium | Marius Orlowski, Alexander L. Barr, Mariam Sadaka | 2007-01-16 |
| 7160769 | Channel orientation to enhance transistor performance | Alexander L. Barr, Dejan Jovanovic, Bich-Yen Nguyen, Mariam Sadaka, Voon-Yew Thean | 2007-01-09 |
| 7074664 | Dual metal gate electrode semiconductor fabrication process and structure thereof | Olubunmi O. Adetutu, Robert E. Jones | 2006-07-11 |
| 7067868 | Double gate device having a heterojunction source/drain and strained channel | Voon-Yew Thean, Mariam Sadaka, Alexander L. Barr, Venkat R. Kolagunta, Bich-Yen Nguyen +2 more | 2006-06-27 |
| 7056778 | Semiconductor layer formation | Chun-Li Liu, Mariam Sadaka, Alexander L. Barr, Bich-Yen Nguyen, Voon-Yew Thean +2 more | 2006-06-06 |
| 7037795 | Low RC product transistors in SOI semiconductor process | Alexander L. Barr, Olubunmi O. Adetutu, Bich-Yen Nguyen, Marius Orlowski, Mariam Sadaka +1 more | 2006-05-02 |
| 7029980 | Method of manufacturing SOI template layer | Chun-Li Liu, Marius Orlowski, Matthew W. Stoker, Philip J. Tobin, Mariam Sadaka +4 more | 2006-04-18 |
| 7018901 | Method for forming a semiconductor device having a strained channel and a heterojunction source/drain | Voon-Yew Thean, Mariam Sadaka, Alexander L. Barr, Venkat R. Kolagunta, Bich-Yen Nguyen +2 more | 2006-03-28 |
| 6838322 | Method for forming a double-gated semiconductor device | Daniel T. Pham, Alexander L. Barr, Leo Mathew, Bich-Yen Nguyen, Anne Vandooren | 2005-01-04 |
| 6831350 | Semiconductor structure with different lattice constant materials and method for forming the same | Chun-Li Liu, Alexander L. Barr, John M. Grant, Bich-Yen Nguyen, Marius Orlowski +2 more | 2004-12-14 |
| 5918147 | Process for forming a semiconductor device with an antireflective layer | Stanley M. Filipiak, T. P. Ong, Jung-Hui Lin, Wayne M. Paulson, Bernard J. Roman | 1999-06-29 |
| 5589423 | Process for fabricating a non-silicided region in an integrated circuit | Ting-Chen Hsu, Bradley M. Somero, Mark A. Chonko, Jung-Hui Lin | 1996-12-31 |
| 4902533 | Method for selectively depositing tungsten on a substrate by using a spin-on metal oxide | Jeff L. Klein | 1990-02-20 |