Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6387784 | Method to reduce polysilicon depletion in MOS transistors | Yung Fu Chong, Randall Cher Liang Cha, Lap Chan | 2002-05-14 |
| 6365446 | Formation of silicided ultra-shallow junctions using implant through metal technology and laser annealing process | Yung Fu Chong, Alex See | 2002-04-02 |
| 6339021 | Methods for effective nickel silicide formation | Wee Leng Tan, Simon Chooi | 2002-01-15 |
| 6335253 | Method to form MOS transistors with shallow junctions using laser annealing | Yung Fu Chong, Alex See, Andrew Thye Shen Wee | 2002-01-01 |
| 6316811 | Selective CVD TiSi2 deposition with TiSi2 liner | — | 2001-11-13 |
| 6284610 | Method to reduce compressive stress in the silicon substrate during silicidation | Randall Cher Liang Cha, Chee Tee Chua, Lap Chan | 2001-09-04 |
| 6271133 | Optimized Co/Ti-salicide scheme for shallow junction deep sub-micron device fabrication | Chong Wee Lim, Eng Hua Lim, Soh Yun Siah, Chun Hui Low | 2001-08-07 |
| 6180501 | Method to fabricate a double-polysilicon gate structure for a sub-quarter micron self-aligned-titanium silicide process | Chaw Sing Ho, Lap Chan | 2001-01-30 |
| 6153485 | Salicide formation on narrow poly lines by pulling back of spacer | Soh Yun Siah | 2000-11-28 |
| 6110811 | Selective CVD TiSi.sub.2 deposition with TiSi.sub.2 liner | — | 2000-08-29 |
| 6093628 | Ultra-low sheet resistance metal/poly-si gate for deep sub-micron CMOS application | Chong Wee Lim, Soh Yun Siah, Eng Hwa Lim, Lap Chan | 2000-07-25 |
| 6025267 | Silicon nitride--TEOS oxide, salicide blocking layer for deep sub-micron devices | Soh Yun Siah, Yong Meng Lee | 2000-02-15 |
| 6010954 | Cmos gate architecture for integration of salicide process in sub 0.1 . .muM devices | Chaw Sing Ho, R. P.G. Karunasiri, Soo Jin Chua, Kong Hean Lee | 2000-01-04 |
| 5956137 | In-line process monitoring using micro-raman spectroscopy | Eng Hua Lim, Harianto Wong, Kong Hean Lee | 1999-09-21 |
| 5731239 | Method of making self-aligned silicide narrow gate electrodes for field effect transistors having low sheet resistance | Harianto Wong, Lap Chan | 1998-03-24 |
| 5264704 | High efficiency cathodoluminescence detector with high discrimination against backscattered electrons | Jacob C. H. Phang, Daniel S. H. Chan | 1993-11-23 |