RC

Randall Cher Liang Cha

CM Chartered Semiconductor Manufacturing: 31 patents #16 of 840Top 2%
GP Globalfoundries Singapore Pte.: 1 patents #427 of 828Top 55%
NS National University Of Singapore: 1 patents #498 of 1,623Top 35%
📍 Singapore, SG: #131 of 13,971 inventorsTop 1%
Overall (All Time): #97,769 of 4,157,543Top 3%
35
Patents All Time

Issued Patents All Time

Showing 1–25 of 35 patents

Patent #TitleCo-InventorsDate
11608472 Method for imparting flame retardancy to a substrate material Sufan Siauw, Ralph T. Webdale 2023-03-21
11326104 Process for preparing flame retardant compositions Sufan Siauw, Ralph T. Webdale 2022-05-10
10752840 Flame retardant compositions and processes for preparation thereof Sufan Siauw, Ralph T. Webdale 2020-08-25
8766454 Integrated circuit with self-aligned line and via Yeow Kheng Lim, Alex See, Wang Ling Goh 2014-07-01
7119010 Integrated circuit with self-aligned line and via and manufacturing method therefor Yeow Kheng Lim, Alex See, Wang Ling Goh 2006-10-10
6878623 Technique to achieve thick silicide film for ultra-shallow junctions Cheng Tan, Alex See, Lap Chan 2005-04-12
6849928 Dual silicon-on-insulator device wafer die Yeow Kheng Lim, Alex See, Tae Jong Lee, Wang Ling Goh 2005-02-01
6841441 Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more 2005-01-11
6828082 Method to pattern small features by using a re-flowable hard mask Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more 2004-12-07
6780691 Method to fabricate elevated source/drain transistor with large area for silicidation Yeow Kheng Lim, Alex See, Jia Zhen Zheng 2004-08-24
6727151 Method to fabricate elevated source/drain structures in MOS transistors Yung Fu Chong, Alex See 2004-04-27
6664153 Method to fabricate a single gate with dual work-functions Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more 2003-12-16
6632712 Method of fabricating variable length vertical transistors Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more 2003-10-14
6613652 Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performance Yeow Kheng Lim, Alex See, Tae Jong Lee, Wang Ling Goh 2003-09-02
6610604 Method of forming small transistor gates by using self-aligned reverse spacer as a hard mask Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more 2003-08-26
6558994 Dual silicon-on-insulator device wafer die Yeow Kheng Lim, Alex See, Tae Jong Lee, Wang Ling Goh 2003-05-06
6544848 Method to form an asymmetrical non-volatile memory device using small in-situ doped polysilicon spacers Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more 2003-04-08
6534390 Salicide method for producing a semiconductor device using silicon/amorphous silicon/metal structure Yung Fu Chong, Kin Leong Pey 2003-03-18
6531386 Method to fabricate dish-free copper interconnects Victor Lim, Simon Chooi 2003-03-11
6472697 Assorted aluminum wiring design to enhance chip-level performance for deep sub-micron application Yeow Kheng Lim, Alex See, Wang Ling Goh, Victor Lim 2002-10-29
6468880 Method for fabricating complementary silicon on insulator devices using wafer bonding Yeow Kheng Lim, Alex See, Tae Jong Lee, Wang Ling Goh 2002-10-22
6468851 Method of fabricating CMOS device with dual gate electrode Chew Hoe Ang, Eng Hua Lim, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou +1 more 2002-10-22
6432797 Simplified method to reduce or eliminate STI oxide divots Tae Jong Lee, Alex See, Lap Chan, Yeow Kheng Lim 2002-08-13
6429109 Method to form high k dielectric and silicide to reduce poly depletion by using a sacrificial metal between oxide and gate Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou, Daniel Yen, Chew Hoe Ang +1 more 2002-08-06
6399471 Assorted aluminum wiring design to enhance chip-level performance for deep sub-micron application Yeow Kheng Lim, Alex See, Wang Ling Goh, Victor Lim 2002-06-04