SB

Scott A. Bell

AM AMD: 88 patents #39 of 9,279Top 1%
SL Spansion Llc.: 10 patents #91 of 769Top 15%
Cypress Semiconductor: 9 patents #212 of 1,852Top 15%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
UN Unknown: 2 patents #12,644 of 83,584Top 20%
Fujitsu Limited: 1 patents #14,843 of 24,456Top 65%
Infineon Technologies Ag: 1 patents #4,439 of 7,486Top 60%
📍 San Jose, CA: #229 of 32,062 inventorsTop 1%
🗺 California: #2,022 of 386,348 inventorsTop 1%
Overall (All Time): #13,101 of 4,157,543Top 1%
105
Patents All Time

Issued Patents All Time

Showing 76–100 of 105 patents

Patent #TitleCo-InventorsDate
6323093 Process for fabricating a semiconductor device component by oxidizing a silicon hard mask Qi Xiang, Chih-Yuh Yang 2001-11-27
6309926 Thin resist with nitride hard mask for gate etch application Christopher F. Lyons, Harry J. Levinson, Khanh B. Nguyen, Fei Wang, Chih-Yuh Yang 2001-10-30
6306560 Ultra-thin resist and SiON/oxide hard mask for metal etch Fei Wang, Christopher F. Lyons, Khanh B. Nguyen, Harry J. Levinson, Chih-Yuh Yang 2001-10-23
6306710 Fabrication of a gate structures having a longer length toward the top for formation of a rectangular shaped spacer Wei Long, Olov Karlsson, Bill Liu 2001-10-23
6287918 Process for fabricating a metal semiconductor device component by lateral oxidization Qi Xiang, Chih-Yuh Yang 2001-09-11
6262435 Etch bias distribution across semiconductor wafer Marina V. Plat, Luigi Capodieci, Todd P. Lukanc 2001-07-17
6214683 Process for fabricating a semiconductor device component using lateral metal oxidation Qi Xiang, Chih-Yuh Yang 2001-04-10
6211044 Process for fabricating a semiconductor device component using a selective silicidation reaction Qi Xiang, Chih-Yuh Yang 2001-04-03
6200907 Ultra-thin resist and barrier metal/oxide hard mask for metal etch Fei Wang, Christopher F. Lyons, Khanh B. Nguyen, Harry J. Levinson, Chih-Yuh Yang 2001-03-13
6184128 Method using a thin resist mask for dual damascene stop layer etch Fei Wang, Christopher F. Lyons, Khanh B. Nguyen, Harry J. Levinson, Chih-Yuh Yang 2001-02-06
6171763 Ultra-thin resist and oxide/nitride hard mask for metal etch Fei Wang, Christopher F. Lyons, Khanh B. Nguyen, Harry J. Levinson, Chih-Yuh Yang 2001-01-09
6165695 Thin resist with amorphous silicon hard mask for via etch application Chih-Yuh Yang, Christopher F. Lyons, Harry J. Levinson, Khanh B. Nguyen, Fei Wang 2000-12-26
6162587 Thin resist with transition metal hard mask for via etch application Chih-Yuh Yang, Christopher F. Lyons, Harry J. Levinson, Khanh B. Nguyen, Fei Wang 2000-12-19
6156658 Ultra-thin resist and silicon/oxide hard mask for metal etch Fei Wang, Christopher F. Lyons, Khanh B. Nguyen, Harry J. Levinson, Chih-Yuh Yang 2000-12-05
6140023 Method for transferring patterns created by lithography Harry J. Levinson, Christopher F. Lyons, Khanh B. Nguyen, Fei Wang, Chih-Yuh Yang 2000-10-31
6133129 Method for fabricating a metal structure with reduced length that is beyond photolithography limitations Qi Xiang, Chih-Yuh Yang 2000-10-17
6127070 Thin resist with nitride hard mask for via etch application Chih-Yuh Yang, Christopher F. Lyons, Harry J. Levinson, Khanh B. Nguyen, Fei Wang 2000-10-03
6121155 Integrated circuit fabrication critical dimension control using self-limiting resist etch Chih-Yuh Yang, Qi Xiang 2000-09-19
6121123 Gate pattern formation using a BARC as a hardmask Christopher F. Lyons, Olov Karlsson 2000-09-19
6107172 Controlled linewidth reduction during gate pattern formation using an SiON BARC Chih-Yuh Yang, Daniel A. Steckert 2000-08-22
6103611 Methods and arrangements for improved spacer formation within a semiconductor device William G. En, Minh Van Ngo, Chih-Yuh Yang, David K. Foote, Olov Karlsson +1 more 2000-08-15
6060377 Method for fabricating a polysilicon structure with reduced length that is beyond photolithography limitations Qi Xiang, Chih-Yuh Yang 2000-05-09
6020269 Ultra-thin resist and nitride/oxide hard mask for metal etch Fei Wang, Christopher F. Lyons, Khanh B. Nguyen, Harry J. Levinson, Chih-Yuh Yang 2000-02-01
5990524 Silicon oxime spacer for preventing over-etching during local interconnect formation William G. En, Minh Van Ngo, Chih-Yuh Yang, David K. Foote, Olov Karlsson +1 more 1999-11-23
5965461 Controlled linewidth reduction during gate pattern formation using a spin-on barc Chih-Yuh Yang, Daniel A. Steckert 1999-10-12