Issued Patents All Time
Showing 51–75 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6914277 | Merged FinFET P-channel/N-channel pair | Wiley Eugene Hill, Shibly S. Ahmed, Bin Yu | 2005-07-05 |
| 6911697 | Semiconductor device having a thin fin and raised source/drain areas | Judy Xilin An, Bin Yu | 2005-06-28 |
| 6905923 | Offset spacer process for forming N-type transistors | Eric N. Paton, Qi Xiang | 2005-06-14 |
| 6902991 | Semiconductor device having a thick strained silicon layer and method of its formation | Qi Xiang, Jung-Suk Goo | 2005-06-07 |
| 6897527 | Strained channel FinFET | Srikanteswara Dakshina-Murthy, Judy Xilin An, Zoran Krivokapic, Bin Yu | 2005-05-24 |
| 6893929 | Method of forming strained silicon MOSFET having improved threshold voltage under the gate ends | Qi Xiang, Ming-Ren Lin, Minh Van Ngo | 2005-05-17 |
| 6893930 | Fabrication of field effect transistor with shallow junctions using low temperature activation of antimony | Bin Yu | 2005-05-17 |
| 6894337 | System and method for forming stacked fin structure using metal-induced-crystallization | Shibly S. Ahmed, Bin Yu | 2005-05-17 |
| 6876042 | Additional gate control for a double-gate MOSFET | Bin Yu, Shibly S. Ahmed | 2005-04-05 |
| 6855989 | Damascene finfet gate with selective metal interdiffusion | Shibly S. Ahmed, Ming-Ren Lin, Bin Yu | 2005-02-15 |
| 6855607 | Multi-step chemical mechanical polishing of a gate area in a FinFET | Krishnashree Achuthan, Shibly S. Ahmed, Bin Yu | 2005-02-15 |
| 6852600 | Strained silicon MOSFET having silicon source/drain regions and method for its fabrication | Qi Xiang | 2005-02-08 |
| 6852576 | Method for forming structures in finfet devices | Ming-Ren Lin, Bin Yu | 2005-02-08 |
| 6842048 | Two transistor NOR device | Zoran Krivokapic, Judy Xilin An, Ming-Ren Lin | 2005-01-11 |
| 6833588 | Semiconductor device having a U-shaped gate structure | Bin Yu, Shibly S. Ahmed, Judy Xilin An, Srikanteswara Dakshina-Murthy, Zoran Krivokapic | 2004-12-21 |
| 6812119 | Narrow fins by oxidation in double-gate finfet | Shibly S. Ahmed, Ming-Ren Lin, Bin Yu | 2004-11-02 |
| 6812076 | Dual silicon layer for chemical mechanical polishing planarization | Krishnashree Achuthan, Shibly S. Ahmed, Bin Yu | 2004-11-02 |
| 6803631 | Strained channel finfet | Srikanteswara Dakshina-Murthy, Judy Xilin An, Zoran Krivokapic, Bin Yu | 2004-10-12 |
| 6800910 | FinFET device incorporating strained silicon in the channel region | Ming-Ren Lin, Jung-Suk Goo, Qi Xiang | 2004-10-05 |
| 6787406 | Systems and methods for forming dense n-channel and p-channel fins using shadow implanting | Wiley Eugene Hill, Shibly S. Ahmed, Bin Yu | 2004-09-07 |
| 6787439 | Method using planarizing gate material to improve gate critical dimension in semiconductor devices | Shibly S. Ahmed, Cyrus E. Tabery, Bin Yu | 2004-09-07 |
| 6787864 | Mosfets incorporating nickel germanosilicided gate and methods for their formation | Eric N. Paton, Qi Xiang, Paul R. Besser, Ming-Ren Lin, Minh Van Ngo | 2004-09-07 |
| 6787854 | Method for forming a fin in a finFET device | Chih-Yuh Yang, Shibly S. Ahmed, Srikanteswara Dakshina-Murthy, Cyrus E. Tabery, Bin Yu | 2004-09-07 |
| 6764884 | Method for forming a gate in a FinFET device and thinning a fin in a channel region of the FinFET device | Bin Yu | 2004-07-20 |
| 6762448 | FinFET device with multiple fin structures | Ming-Ren Lin, Bin Yu | 2004-07-13 |