Issued Patents All Time
Showing 76–100 of 140 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9245861 | Wafer process for molded chip scale package (MCSP) with thick backside metallization | Hamza Yilmaz, Yueh-Se Ho, Jun Lu, Zhiqiang Niu, Guo Feng Lian +2 more | 2016-01-26 |
| 9224679 | Wafer level chip scale package with exposed thick bottom metal | — | 2015-12-29 |
| 9224669 | Method and structure for wafer level packaging with large contact area | — | 2015-12-29 |
| 9214419 | Power semiconductor device and preparation method thereof | Hamza Yilmaz, Yueh-Se Ho, Jun Lu | 2015-12-15 |
| 9214417 | Combined packaged power semiconductor device | Yueh-Se Ho, Hamza Yilmaz, Jun Lu | 2015-12-15 |
| 9196534 | Method for preparing semiconductor devices applied in flip chip technology | Ping Huang, Hamza Yilmaz, Yueh-Se Ho, Lei Shi, Liang Zhao +3 more | 2015-11-24 |
| 9184117 | Stacked dual-chip packaging structure and preparation method thereof | Yueh-Se Ho, Hamza Yilmaz, Jun Lu | 2015-11-10 |
| 9171788 | Semiconductor package with small gate clip and assembly method | Hamza Yilmaz, Yueh-Se Ho, Jun Lu, Ming-Chen Lu, Hongtao Gao | 2015-10-27 |
| 9165866 | Stacked dual chip package having leveling projections | Hamza Yilmaz, Xiaotian Zhang, Anup Bhalla, Jun Lu, Kai Liu +2 more | 2015-10-20 |
| 9147586 | Semiconductor package with connecting plate for internal connection | Jun Lu, Kai Liu | 2015-09-29 |
| 9147648 | Multi-die power semiconductor device packaged on a lead frame unit with multiple carrier pins and a metal clip | Hamza Yilmaz | 2015-09-29 |
| 9136379 | Bottom source substrateless power MOSFET | Yueh-Se Ho, Ping Huang | 2015-09-15 |
| 9087828 | Semiconductor device with thick bottom metal and preparation method thereof | Hamza Yilmaz, Jun Lu, Ming-Chen Lu, Yan Huo, Aihua Lu | 2015-07-21 |
| 9054091 | Hybrid packaged lead frame based multi-chip semiconductor device with multiple semiconductor chips and multiple interconnecting structures | Hamza Yilmaz, Jun Lu, Peter H. Wilson, Yan Huo, Zhiqiang Niu +1 more | 2015-06-09 |
| 9040357 | Semiconductor packaging method using connecting plate for internal connection | Jun Lu, Kai Liu | 2015-05-26 |
| 9006901 | Thin power device and preparation method thereof | Yuping Gong, Ming-Chen Lu, Ping Huang, Jun Lu, Hamza Yilmaz | 2015-04-14 |
| 8981539 | Packaged power semiconductor with interconnection of dies and metal clips on lead frame | Hamza Yilmaz | 2015-03-17 |
| 8958369 | Method for processing channel state information, and user equipment | Yu Ngok Li, Huaming WU, Changqing Zhu, Junfeng Zhang | 2015-02-17 |
| 8952509 | Stacked multi-chip bottom source semiconductor device and preparation method thereof | Hamza Yilmaz, Yueh-Se Ho, Jun Lu, Xiaotian Zhang, Zhi Qiang Niu +4 more | 2015-02-10 |
| 8933518 | Stacked power semiconductor device using dual lead frame | Yueh-Se Ho, Lei Shi, Jun Lu, Liang Zhao | 2015-01-13 |
| 8933550 | Structure of mixed semiconductor encapsulation structure with multiple chips and capacitors | Anup Bhalla, Jun Lu | 2015-01-13 |
| 8933545 | Double-side exposed semiconductor device | Yuping Gong | 2015-01-13 |
| 8909281 | Method and system for controlling an uplink transmitting power, and a base station | Zhaohua Lu, Peng Hao, Ying Liu, Kun Liu | 2014-12-09 |
| 8890296 | Wafer level chip scale package | Yueh-Se Ho | 2014-11-18 |
| 8877555 | Flip-chip semiconductor chip packing method | Lei Shi, Yuping Gong | 2014-11-04 |