Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11133128 | System in package module assembly, system in package module, and electronic device | Zhaozheng Hou, Junhe WANG | 2021-09-28 |
| 9854686 | Preparation method of a thin power device | Yan Xun Xue, Ming-Chen Lu, Ping Huang, Jun Lu, Hamza Yilmaz | 2017-12-26 |
| 9437528 | Dual-side exposed semiconductor package with ultra-thin die and manufacturing method thereof | Xiaoming Sui, Yan Yun Xue, Jun Lu | 2016-09-06 |
| 9196534 | Method for preparing semiconductor devices applied in flip chip technology | Yan Xun Xue, Ping Huang, Hamza Yilmaz, Yueh-Se Ho, Lei Shi +3 more | 2015-11-24 |
| 9136154 | Substrateless power device packages | Tao Feng, Zhiqiang Niu, Ruisheng Wu, Ping Huang, Lei Shi +1 more | 2015-09-15 |
| 9006901 | Thin power device and preparation method thereof | Yan Xun Xue, Ming-Chen Lu, Ping Huang, Jun Lu, Hamza Yilmaz | 2015-04-14 |
| 8987878 | Substrateless power device packages | Tao Feng, Zhiqiang Niu, Ruisheng Wu, Ping Huang, Lei Shi +1 more | 2015-03-24 |
| 8952509 | Stacked multi-chip bottom source semiconductor device and preparation method thereof | Hamza Yilmaz, Yueh-Se Ho, Yan Xun Xue, Jun Lu, Xiaotian Zhang +4 more | 2015-02-10 |
| 8933545 | Double-side exposed semiconductor device | Yan Xun Xue | 2015-01-13 |
| 8877555 | Flip-chip semiconductor chip packing method | Lei Shi, Yan Xun Xue | 2014-11-04 |
| 8841167 | Manufacturing method of a semiconductor package of small footprint with a stack of lead frame die paddle sandwiched between high-side and low-side MOSFET | Yan Xun Xue, Liang Zhao | 2014-09-23 |
| 8778735 | Packaging method of molded wafer level chip scale package (WLCSP) | Yan Xun Xue, Hamza Yilmaz, Yueh-Se Ho, Jun Lu, Ping Huang +2 more | 2014-07-15 |
| 8642397 | Semiconductor wafer level package (WLP) and method of manufacture thereof | Yan Xun Xue, Ping Huang | 2014-02-04 |
| 8563361 | Packaging method of molded wafer level chip scale package (WLCSP) | Yan Xun Xue, Hamza Yilmaz, Yueh-Se Ho, Jun Lu, Ping Huang +2 more | 2013-10-22 |
| 8519520 | Semiconductor package of small footprint with a stack of lead frame die paddle sandwich between high-side and low-side MOSFETs and manufacturing method | Yan Xun Xue, Liang Zhao | 2013-08-27 |
| 8486803 | Wafer level packaging method of encapsulating the bottom and side of a semiconductor chip | Ping Huang, Ruisheng Wu, Lei Duan, Yi-Yi Chen | 2013-07-16 |
| 8450152 | Double-side exposed semiconductor device and its manufacturing method | Yan Xun Xue | 2013-05-28 |
| 8344499 | Chip-exposed semiconductor device | Yan Xun Xue | 2013-01-01 |
| 8338232 | Power semiconductor device package method | Lei Shi, Yan Xun Xue | 2012-12-25 |
| 8236613 | Wafer level chip scale package method using clip array | — | 2012-08-07 |
| 8163601 | Chip-exposed semiconductor device and its packaging method | Yan Xun Xue | 2012-04-24 |