Issued Patents 2022
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11495489 | Method for forming a semiconductor-on-insulator (SOI) substrate | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Shih Pei Chou +1 more | 2022-11-08 |
| 11430729 | MIM capacitor with a symmetrical capacitor insulator structure | Hsing-Lien Lin, Cheng-Te Lee, Rei-Lin Chu, Chii-Ming Wu, Chung-Yi Yu | 2022-08-30 |
| 11404465 | Epitaxial semiconductor liner for enhancing uniformity of a charged layer in a deep trench and methods of forming the same | Ru-Liang Lee, Yu-Hung Cheng | 2022-08-02 |
| 11398516 | Conductive contact for ion through-substrate via | Min-Ying Tsai, Cheng-Ta Wu | 2022-07-26 |
| 11348790 | Apparatus and method for wafer bonding | Yeong-Jyh Lin, Chin-Wei Liang | 2022-05-31 |
| 11315972 | BSI image sensor and method of forming same | Hung-Wen Hsu, Jiech-Fun Lu, U-Ting Chen, Shu-Ting Tsai, Hsiu-Yu Cheng | 2022-04-26 |
| 11276587 | Wafer bonding method and apparatus with curved surfaces | Chih-Hui Huang, Chun-Han Tsao, Sheng-Chau Chen, Chia-Shiung Tsai, Xiaomeng Chen | 2022-03-15 |
| 11270978 | Buffer layer(s) on a stacked structure having a via | Chen-Fa Lu, Cheng-Yuan Tsai, Chia-Shiung Tsai | 2022-03-08 |
| 11264469 | Method for forming thin semiconductor-on-insulator (SOI) substrates | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuo-Hwa Tzeng, Shih Pei Chou +1 more | 2022-03-01 |
| 11232946 | Method of optimizing film deposition process in semiconductor fabrication by using gas sensor | Rei-Lin Chu, Chih-Ming Chen, Chung-Yi Yu | 2022-01-25 |
| 11232975 | Semiconductor-on-insulator (SOI) substrate having dielectric structures that increase interface bonding strength | Min-Ying Tsai | 2022-01-25 |
| 11232974 | Fabrication method of metal-free SOI wafer | Yu-Hung Cheng, Pu Chen, Cheng-Ta Wu, Po-Jung Chiang, Ru-Liang Lee +4 more | 2022-01-25 |