JK

Jackson Chung Peng Kong

IN Intel: 24 patents #36 of 5,160Top 1%
Overall (2021): #1,291 of 548,734Top 1%
24
Patents 2021

Issued Patents 2021

Patent #TitleCo-InventorsDate
11205622 Stiffener shield for device integration Jenny Shio Yin Ong, Seok Ling Lim, Bok Eng Cheah 2021-12-21
11195801 Embedded reference layers for semiconductor package substrates Bok Eng Cheah, Seok Ling Lim, Jenny Shio Yin Ong, Kooi Chi Ooi 2021-12-07
11177226 Flexible shield for semiconductor devices Bok Eng Cheah, Eng Huat Goh, Khang Choong Yong, Min Suet Lim 2021-11-16
11164827 Substrate with gradiated dielectric for reducing impedance mismatch Bok Eng Cheah, Ping Ping Ooi, Kooi Chi Ooi 2021-11-02
11153968 Device, system and method to promote the integrity of signal communications Bok Eng Cheah, Khang Choong Yong, Yun Ling, Chia Voon Tan 2021-10-19
11121074 Packaged die stacks with stacked capacitors and methods of assembling same Bok Eng Cheah, Mooi Ling Chang, Ping Ping Ooi, Wen Wei Lum 2021-09-14
11049801 Encapsulated vertical interconnects for high-speed applications and methods of assembling same Bok Eng Cheah, Kooi Chi Ooi, Yang Liang Poh 2021-06-29
11037874 Plane-less voltage reference interconnects Bok Eng Cheah, Jenny Shio Yin Ong, Seok Ling Lim 2021-06-15
10998261 Over-molded IC package with in-mold capacitor Bok Eng Cheah, Wen Wei Lum, Mooi Ling Chang, Ping Ping Ooi 2021-05-04
10985147 Capacitors embedded in stiffeners for small form-factor and methods of assembling same Jenny Shio Yin Ong, Seok Ling Lim, Bok Eng Cheah, Chin Lee Kuan 2021-04-20
10978434 Systems in packages including wide-band phased-array antennas and methods of assembling same Bok Eng Cheah, Boon Ping Koh, Kooi Chi Ooi 2021-04-13
10978407 Stiffener-integrated interconnect bypasses for chip-package apparatus and methods of assembling same Bok Eng Cheah, Howard L. Heck, Seok Ling Lim, Jenny Shio Yin Ong 2021-04-13
10980108 Multi-conductor interconnect structure for a microelectronic device Ping Ping Ooi, Bok Eng Cheah, Kooi Chi Ooi 2021-04-13
10973116 3D high-inductive ground plane for crosstalk reduction Bok Eng Cheah, Khang Choong Yong, Ramaswamy Parthasarathy 2021-04-06
10971440 Semiconductor package having an impedance-boosting channel Bok Eng Cheah, Khang Choong Yong, Po Yin Yaw, Kok Hou TEH 2021-04-06
10964677 Electronic packages with stacked sitffeners and methods of assembling same Jenny Shio Yin Ong, Bok Eng Cheah, Seok Ling Lim, Kooi Chi Ooi 2021-03-30
10957649 Overpass dice stacks and methods of using same Bok Eng Cheah, Min Suet Lim 2021-03-23
10950552 Ring-in-ring configurable-capacitance stiffeners and methods of assembling same Bok Eng Cheah, Kooi Chi Ooi, Paik Wen Ong 2021-03-16
10943792 3D stacked-in-recess system in package Bok Eng Cheah, Min Suet Lim, Howe Yin Loo 2021-03-09
10916524 Stacked dice systems Bok Eng Cheah, Kooi Chi Ooi, Ping Ping Ooi 2021-02-09
10910325 Integrated circuit packages with conductive element having cavities housing electrically connected embedded components Seok Ling Lim, Jenny Shio Yin Ong, Bok Eng Cheah 2021-02-02
10903142 Micro through-silicon via for transistor density scaling Bok Eng Cheah, Choong Kooi Chee, Tat Hin Tan, Wai Ling Lee 2021-01-26
10903155 Vertical modular stiffeners for stacked multi-device packages Bok Eng Cheah, Jenny Shio Yin Ong, Seok Ling Lim 2021-01-26
10886209 Multiple-layer, self-equalizing interconnects in package substrates Stephen H. Hall, Bok Eng Cheah, Chaitanya Sreerama 2021-01-05