Issued Patents 2018
Showing 26–50 of 101 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10079249 | Finfet devices with multiple channel lengths | Effendi Leobandung | 2018-09-18 |
| 10068922 | FinFET devices with multiple channel lengths | Effendi Leobandung | 2018-09-04 |
| 10069015 | Width adjustment of stacked nanowires | Kangguo Cheng, Xin Miao, Ruilong Xie | 2018-09-04 |
| 10056408 | Structure and method to form a FinFET device | Andres Bryant, Jeffrey B. Johnson, Effendi Leobandung | 2018-08-21 |
| 10056334 | Dual metal-insulator-semiconductor contact structure and formulation method | Takashi Ando, Hiroaki Niimi | 2018-08-21 |
| 10056378 | Silicon nitride fill for PC gap regions to increase cell density | Dechao Guo, Zuoguang Liu, Chun-Chen Yeh | 2018-08-21 |
| 10050107 | Nanosheet transistors on bulk material | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2018-08-14 |
| 10038076 | Parasitic capacitance reducing contact structure in a finFET | Miaomiao Wang, Chun-Chen Yeh, Hui Zang | 2018-07-31 |
| 10037919 | Integrated single-gated vertical field effect transistor (VFET) and independent double-gated VFET | Ruilong Xie, Chun-Chen Yeh, Kangguo Cheng | 2018-07-31 |
| 10032677 | Method and structure to fabricate closely packed hybrid nanowires at scaled pitch | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-07-24 |
| 10032884 | Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz, Ruilong Xie | 2018-07-24 |
| 10020381 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Su Chen Fan, Zuoguang Liu, Heng Wu | 2018-07-10 |
| 10014295 | Self heating reduction for analog radio frequency (RF) device | Injo Ok, Balasubramanian Pranatharthiharan, Charan V. Surisetty, Soon-Cheon Seo | 2018-07-03 |
| 10014299 | Field effect transistor device spacers | Xiuyu Cai, Sanjay C. Mehta | 2018-07-03 |
| 10014220 | Self heating reduction for analog radio frequency (RF) device | Injo Ok, Balasubramanian Pranatharthiharan, Charan V. Surisetty, Soon-Cheon Seo | 2018-07-03 |
| 10014370 | Air gap adjacent a bottom source/drain region of vertical transistor device | Ruilong Xie, Chun-Chen Yeh, Kangguo Cheng | 2018-07-03 |
| 10002940 | Spacer chamfering gate stack scheme | Hyun-Jin Cho, Hui Zang | 2018-06-19 |
| 10002939 | Nanosheet transistors having thin and thick gate dielectric material | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2018-06-19 |
| 10002945 | Composite spacer enabling uniform doping in recessed fin devices | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-06-19 |
| 10002921 | Nanowire semiconductor device including lateral-etch barrier region | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-06-19 |
| 10002965 | Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping | Kangguo Cheng, Ruilong Xie | 2018-06-19 |
| 9997609 | Implantation formed metal-insulator-semiconductor (MIS) contacts | Chia-Yu Chen, Zuoguang Liu, Chun-Chen Yeh | 2018-06-12 |
| 9997472 | Support for long channel length nanowire transistors | Karthik Balakrishnan, Isaac Lauer, Jeffrey W. Sleight | 2018-06-12 |
| 9997607 | Mirrored contact CMOS with self-aligned source, drain, and back-gate | Terence B. Hook, Joshua M. Rubin | 2018-06-12 |
| 9991339 | Bulk to silicon on insulator device | Terence B. Hook, Joshua M. Rubin | 2018-06-05 |