Issued Patents 2003
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6642148 | RELACS shrink method applied for single print resist mask for LDD or buried bitline implants using chemically amplified DUV type photoresist | Kouros Ghandehari, Emmanuil H. Lingunis, Angela T. Hui, Scott A. Bell, Jusuke Ogura | 2003-11-04 |
| 6638358 | Method and system for processing a semiconductor device | Lu You, Hao Fang | 2003-10-28 |
| 6610580 | Flash memory array and a method and system of fabrication thereof | Maria C. Chan, Hao Fang, Mike Templeton | 2003-08-26 |
| 6566230 | Shallow trench isolation spacer for weff improvement | Harpreet Sachar, Unsoon Kim, Chih-Yuh Yang, Jayendra D. Bhakta | 2003-05-20 |
| 6515328 | Semiconductor devices with reduced control gate dimensions | Wenge Yang, Lewis Shen | 2003-02-04 |
| 6509232 | Formation of STI (shallow trench isolation) structures within core and periphery areas of flash memory device | Unsoon Kim, Yider Wu, Chi Chang, Angela T. Hui, Yu Sun | 2003-01-21 |