Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6457234 | Process for manufacturing self-aligned corrosion stop for copper C4 and wirebond | Daniel C. Edelstein, Judith M. Rubino, Anthony K. Stamper | 2002-10-01 |
| 6436803 | Manufacturing computer systems with fine line circuitized substrates | Anilkumar C. Bhatt, Roy H. Magnuson, Thomas R. Miller, Voya R. Markovich, Stephen L. Tisdale | 2002-08-20 |
| 6358832 | Method of forming barrier layers for damascene interconnects | Daniel C. Edelstein, Timothy J. Dalton, John G. Gaudiello, Mahadevaiyer Krishnan, Sandra G. Malhotra +2 more | 2002-03-19 |
| 6342733 | Reduced electromigration and stressed induced migration of Cu wires by surface coating | Chao-Kun Hu, Robert Rosenberg, Judith M. Rubino, Anthony K. Stamper | 2002-01-29 |
| 6341418 | Method for direct chip attach by solder bumps and an underfill layer | Guy Paul Brouillette, David Danovitch, Peter A. Gruber, Michael Liehr | 2002-01-29 |
| 6340630 | Method for making interconnect for low temperature chip attachment | Daniel G. Berger, Guy Paul Brouillette, David Danovitch, Peter A. Gruber, Bruce Lee Humphrey +2 more | 2002-01-22 |
| 6339024 | Reinforced integrated circuits | Kevin S. Petrarca, John E. Heidenreich, III, Judith M. Rubino, Richard P. Volant, George F. Walker | 2002-01-15 |
| 6335104 | Method for preparing a conductive pad for electrical connection and conductive pad formed | Daniel C. Edelstein, John G. Gaudiello, Judith M. Rubino, George F. Walker | 2002-01-01 |