Issued Patents All Time
Showing 51–75 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10156607 | Bidirectional scan chain structure and method | Yun-Han Lee | 2018-12-18 |
| 10156609 | Device and method for robustness verification | Stanley John, Ji-Jan Chen, Yun-Han Lee | 2018-12-18 |
| 10115643 | Circuit and method for monolithic stacked integrated circuit testing | — | 2018-10-30 |
| 10108764 | Power consumption estimation method for system on chip (SOC), system for implementing the method | Shereef Shehata, Tze-Chiang Huang, Yun-Han Lee, Mei Hsu Wong | 2018-10-23 |
| 10101796 | Processor power estimation | Kai-Yuan Ting, Tze-Chiang Huang, Yun-Han Lee | 2018-10-16 |
| 10078720 | Methods and systems for circuit fault diagnosis | Zipeng Li, Yun-Han Lee | 2018-09-18 |
| 10061374 | Dynamic frequency scaling | Kai-Yuan Ting, Ashok Mehta, Stanley John | 2018-08-28 |
| 9835680 | Method, device and computer program product for circuit testing | Yun-Han Lee, Saman M. I. Adham | 2017-12-05 |
| 9830413 | System and method for estimating performance, power, area and cost (PPAC) | Tze-Chiang Huang, Yun-Han Lee | 2017-11-28 |
| 9817029 | Test probing structure | Mill-Jer Wang, Ching-Fang Chen, Chung-Sheng Yuan, Chao-Yang Yeh, Chin-Chou Liu +2 more | 2017-11-14 |
| 9811627 | Method of component partitions on system on chip and device thereof | Yung-Chin Hou, Yun-Han Lee | 2017-11-07 |
| 9791510 | Circuit and method for diagnosing scan chain failures | — | 2017-10-17 |
| 9704766 | Interposers of 3-dimensional integrated circuit package systems and methods of designing the same | Mill-Jer Wang, Chung-Sheng Yuan, Tom C. Chen, Chao-Yang Yeh, Chin-Chou Liu +1 more | 2017-07-11 |
| 9686852 | Multi-dimensional integrated circuit structures and methods of forming the same | Mark Semmelmeyer | 2017-06-20 |
| 9651621 | System for and method of semiconductor fault detection | — | 2017-05-16 |
| 9647028 | Wafer on wafer stack method of forming and method of using the same | Yun-Han Lee | 2017-05-09 |
| 9646128 | System and method for validating stacked dies by comparing connections | Ashok Mehta, Stanley John, Kai-Yuan Ting, Chao-Yang Yeh | 2017-05-09 |
| 9633147 | Power state coverage metric and method for estimating the same | Stanley John, Tze-Chiang Huang, Yun-Han Lee | 2017-04-25 |
| 9625971 | System and method of adaptive voltage frequency scaling | Kai-Yuan Ting, Ashok Mehta | 2017-04-18 |
| 9625523 | Method and apparatus for interconnect test | Saman M. I. Adham | 2017-04-18 |
| 9612277 | System and method for functional verification of multi-die 3D ICs | Stanley John, Ashok Mehta, Kai-Yuan Ting | 2017-04-04 |
| 9599670 | Circuit and method for monolithic stacked integrated circuit testing | — | 2017-03-21 |
| 9514268 | Interposer defect coverage metric and method to maximize the same | Ashok Mehta | 2016-12-06 |
| 9513332 | Probe card partition scheme | Mill-Jer Wang | 2016-12-06 |
| 9404971 | Circuit and method for monolithic stacked integrated circuit testing | Ashok Mehta | 2016-08-02 |