Issued Patents All Time
Showing 26–50 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11354465 | Function safety and fault management modeling at electrical system level (ESL) | Kai-Yuan Ting, Yun-Han Lee, Mei Hsu Wong, Hsin-Cheng Chen | 2022-06-07 |
| 11343433 | Image processing apparatus having overlapping sub-regions | Yun-Han Lee, Ashok Mehta | 2022-05-24 |
| 11295831 | Systems and methods to detect cell-internal defects | Ankita Patidar | 2022-04-05 |
| 11231767 | Dynamic frequency scaling | Kai-Yuan Ting, Ashok Mehta, Stanley John | 2022-01-25 |
| 11163351 | Power estimation | Kai-Yuan Ting, Shereef Shehata, Tze-Chiang Huang, Mei Hsu Wong, Yun-Han Lee | 2021-11-02 |
| 11113444 | Machine-learning based scan design enablement platform | Yun-Han Lee, Vinay Kotha, Ankita Patidar | 2021-09-07 |
| 11068633 | Fault diagnostics | Ankita Patidar | 2021-07-20 |
| 11055455 | Method and system for reducing migration errors | Yun-Han Lee, Ankita Patidar | 2021-07-06 |
| 11025261 | Phase-locked loop monitor circuit | Ji-Jan Chen, Stanley John, Yun-Han Lee, Yen-Hao Huang | 2021-06-01 |
| 10985922 | Device with self-authentication | Haohua Zhou | 2021-04-20 |
| 10871518 | Systems and methods for determining systematic defects | Yun-Han Lee, Ankita Patidar | 2020-12-22 |
| 10867098 | System and method for ESL modeling of machine learning | Kai-Yuan Ting, Tze-Chiang Huang, Yun-Han Lee | 2020-12-15 |
| 10867089 | Electrical system level (ESL) battery discharge simulation | Charlie Zhou, Kai-Yuan Ting, Tze-Chiang Huang, Yun-Han Lee | 2020-12-15 |
| 10782318 | Test probing structure | Mill-Jer Wang, Ching-Fang Chen, Chung-Sheng Yuan, Chao-Yang Yeh, Chin-Chou Liu +2 more | 2020-09-22 |
| 10776538 | Function safety and fault management modeling at electrical system level (ESL) | Kai-Yuan Ting, Yun-Han Lee, Mei Hsu Wong, Hsin-Cheng Chen | 2020-09-15 |
| 10719648 | System and method for system-level parameter estimation | Tze-Chiang Huang, Kai-Yuan Ting, Yun-Han Lee, Shereef Shehata, Mei Hsu Wong | 2020-07-21 |
| 10685157 | Power-aware scan partitioning | Ankita Patidar, Yun-Han Lee | 2020-06-16 |
| 10680627 | Phase-locked loop monitor circuit | Ji-Jan Chen, Stanley John, Yun-Han Lee, Yen-Hao Huang | 2020-06-09 |
| 10666578 | Network-on-chip system and a method of generating the same | Ravi Venugopalan, Yun-Han Lee | 2020-05-26 |
| 10539617 | Scan architecture for interconnect testing in 3D integrated circuits | Yun-Han Lee, Saman M. I. Adham, Marat Gershoig | 2020-01-21 |
| 10440281 | Image processing apparatus on integrated circuit and method thereof | Yun-Han Lee, Ashok Mehta | 2019-10-08 |
| 10371751 | Circuit and method for diagnosing scan chain failures | — | 2019-08-06 |
| 10345883 | Power estimation | Kai-Yuan Ting, Shereef Shehata, Tze-Chiang Huang, Mei Hsu Wong, Yun-Han Lee | 2019-07-09 |
| 10267857 | Method and system for functional safety verification | Abhishek Koneru, Tri Ngo, Yun-Han Lee | 2019-04-23 |
| 10256828 | Phase-locked loop monitor circuit | Ji-Jan Chen, Stanley John, Yun-Han Lee, Yen-Hao Huang | 2019-04-09 |