Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12399211 | Method of testing an integrated circuit and testing system | Sandeep Kumar Goel, Yun-Han Lee | 2025-08-26 |
| 12346147 | Circuit and methodology for power profile | Sandeep Kumar Goel, Yun-Han Lee | 2025-07-01 |
| 12314644 | Integrated circuit design method, system and computer program product | Sandeep Kumar Goel, Yun-Han Lee | 2025-05-27 |
| 12229483 | Method and system for reducing migration errors | Sandeep Kumar Goel, Yun-Han Lee | 2025-02-18 |
| 11879933 | Method of testing an integrated circuit and testing system | Sandeep Kumar Goel, Yun-Han Lee | 2024-01-23 |
| 11837308 | Systems and methods to detect cell-internal defects | Sandeep Kumar Goel | 2023-12-05 |
| 11727177 | Integrated circuit design method, system and computer program product | Sandeep Kumar Goel, Yun-Han Lee | 2023-08-15 |
| 11699010 | Method and system for reducing migration errors | Sandeep Kumar Goel, Yun-Han Lee | 2023-07-11 |
| 11663387 | Fault diagnostics | Sandeep Kumar Goel | 2023-05-30 |
| 11386253 | Power-aware scan partitioning | Sandeep Kumar Goel, Yun-Han Lee | 2022-07-12 |
| 11379643 | Integrated circuit design method, system and computer program product | Sandeep Kumar Goel, Yun-Han Lee | 2022-07-05 |
| 11295831 | Systems and methods to detect cell-internal defects | Sandeep Kumar Goel | 2022-04-05 |
| 11113444 | Machine-learning based scan design enablement platform | Sandeep Kumar Goel, Yun-Han Lee, Vinay Kotha | 2021-09-07 |
| 11068633 | Fault diagnostics | Sandeep Kumar Goel | 2021-07-20 |
| 11055455 | Method and system for reducing migration errors | Sandeep Kumar Goel, Yun-Han Lee | 2021-07-06 |
| 10871518 | Systems and methods for determining systematic defects | Sandeep Kumar Goel, Yun-Han Lee | 2020-12-22 |
| 10685157 | Power-aware scan partitioning | Sandeep Kumar Goel, Yun-Han Lee | 2020-06-16 |