SS

Sharad Saxena

TI Texas Instruments: 12 patents #1,155 of 12,488Top 10%
PS Pdf Solutions: 11 patents #30 of 143Top 25%
Overall (All Time): #179,703 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12416663 Embedded system to characterize BTI degradation effects in MOSFETs Michele Quarantelli, Alberto Piadena, Tomasz Brozek, Christopher Hess, Larg Weiland 2025-09-16
10852337 Test structures for measuring silicon thickness in fully depleted silicon-on-insulator technologies Tomasz Brozek, Yuan Yu, Mike Kyu Hyon Pak, Meindert Martin Lunenborg 2020-12-01
10641804 Method for applying charge-based-capacitance-measurement with switches using only NMOS or only PMOS transistors 2020-05-05
10529631 Test structures and method for electrical measurement of FinFET fin height Jianjun Cheng, Yuan Yu 2020-01-07
9952268 Method for accurate measurement of leaky capacitors using charge based capacitance measurements Yuan Yu 2018-04-24
9691669 Test structures and methods for measuring silicon thickness in fully depleted silicon-on-insulator technologies Thomas Brozek, Yuan Yu, Mike Kyu Hyon Pak, Meindert Martin Lunenborg 2017-06-27
7932105 Systems and methods for detecting and monitoring nickel-silicide process and induced failures Jae-Yong Park, Benjamin Shieh, Mark A. Spinelli, Sr., Shiying Xiong, Hossein Karbasi 2011-04-26
7644388 Method for reducing layout printability effects on semiconductor device performance Lidia Daldoss, Christoph Dolainsky, Rakesh Vallishayee 2010-01-05
7047505 Method for optimizing the characteristics of integrated circuits components from circuit specifications Andrei Shibkov, Patrick D. McNamara, Carlo Guardiani 2006-05-16
7003742 Methodology for the optimization of testing and diagnosis of analog and mixed signal ICs and embedded cores Patrick D. McNamara, Carlo Guardiani, Lidia Daldoss 2006-02-21
6978229 Efficient method for modeling and simulation of the impact of local and global variation on integrated circuits Carlo Guardiani, Philip D. Schumaker, Patrick D. McNamara, Dale Coder 2005-12-20
6530064 Method and apparatus for predicting an operational lifetime of a transistor Karthik Vasanth, Shian Aur, E. Ajith Amerasekera, Joseph C. Davis, Richard G. Burch 2003-03-04
6388288 Integrating dual supply voltages using a single extra mask level Karthik Vasanth, Richard G. Burch, Purnendu K. Mozumder, Joseph C. Davis, Chenjing Fernando +1 more 2002-05-14
6381564 Method and system for using response-surface methodologies to determine optimal tuning parameters for complex simulators Joseph C. Davis, Karthik Vasanth, Purnendu K. Mozumder, Suraj Rao, Chenjing Fernando +1 more 2002-04-30
6317640 System and method for non-parametric modeling of processed induced variability Suraj Rao, Pushkar Apte, Purnendu K. Mozumder, Richard G. Burch, Karthik Vasanth +2 more 2001-11-13
6311096 Design of microelectronic process flows for manufacturability and performance Karthik Vasanth, Richard G. Burch, Purnendu K. Mozumder, Suraj Rao, Joseph C. Davis 2001-10-30
6157062 Integrating dual supply voltage by removing the drain extender implant from the high voltage device Karthik Vasanth, Richard G. Burch, Purnendu K. Mozumder, Chenjing Fernando, Joseph C. Davis +1 more 2000-12-05
5912678 Process flow design at the module effects level through the use of acceptability regions Amy J. Unruh, Purnendu K. Mozumder, Richard G. Burch 1999-06-15
5751582 Controlling process modules using site models and monitor wafer control Purnendu K. Mozumder, Gregory B. Shinn, Kelly Taylor 1998-05-12
5642296 Method of diagnosing malfunctions in semiconductor manufacturing equipment 1997-06-24
5546312 Use of spatial models for simultaneous control of various non-uniformity metrics Purnendu K. Mozumder 1996-08-13
5483636 Automated diagnosis using wafer tracking databases 1996-01-09
5408405 Multi-variable statistical process controller for discrete manufacturing Purnendu K. Mozumder, William W. Pu 1995-04-18