Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10852337 | Test structures for measuring silicon thickness in fully depleted silicon-on-insulator technologies | Sharad Saxena, Tomasz Brozek, Yuan Yu, Mike Kyu Hyon Pak | 2020-12-01 |
| 10643735 | Passive array test structure for cross-point memory characterization | Tomasz Brozek, Christopher Hess, Rakesh Vallishayee, Hendrik Schneider, Yuan Yu +2 more | 2020-05-05 |
| 9691669 | Test structures and methods for measuring silicon thickness in fully depleted silicon-on-insulator technologies | Sharad Saxena, Thomas Brozek, Yuan Yu, Mike Kyu Hyon Pak | 2017-06-27 |
| 8066430 | Semiconductor substrate temperature determination | Srdjan Kordic, Jean-Philippe Jacquemin | 2011-11-29 |
| 6746935 | MOS transistor in an integrated circuit and active area forming method | Walter De Coster, Alain Inard, Jos Guelen | 2004-06-08 |
| 6561839 | Process for forming shallow isolating regions in an integrated circuit and an integrated circuit thus formed | Walter De Coster, Alain Inard, Franck Arnaud | 2003-05-13 |
| 6518114 | Method of forming an insulating zone | Alain Inard, Dominique Cecile Zulian, Didier Levy, Walter De Coster, Jean-Claude Oberlin | 2003-02-11 |