Issued Patents All Time
Showing 101–125 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6902939 | Integrated circuit and method | Theodore S. Moise, Guoqiang Xing, Mark Visokay, Justin Gaynor, Stephen Roy Gilbert +2 more | 2005-06-07 |
| 6876021 | Use of amorphous aluminum oxide on a capacitor sidewall for use as a hydrogen barrier | J. Scott Martin, Scott R. Summerfelt, Theodore S. Moise, Kelly Taylor, Sanjeev Aggarwal +3 more | 2005-04-05 |
| 6852645 | High temperature interface layer growth for high-k gate dielectric | James Joseph Chambers, Antonio Luis Pacheco Rotondaro, Mark Visokay | 2005-02-08 |
| 6828200 | Multistage deposition that incorporates nitrogen via an intermediate step | James Joseph Chambers, Mark Visokay | 2004-12-07 |
| 6828161 | Method of forming an FeRAM having a multi-layer hard mask and patterning thereof | Scott R. Summerfelt, Sanjeev Aggarwal, Theodore S. Moise, J. Scott Martin | 2004-12-07 |
| 6821873 | Anneal sequence for high-&kgr; film property optimization | Mark Visokay, Antonio Luis Pacheco Rotondaro | 2004-11-23 |
| 6809370 | High-k gate dielectric with uniform nitrogen profile and methods for making the same | Manuel Quevedo-Lopez, James Joseph Chambers, Mark Visokay, Antonio Luis Pacheco Rotondaro | 2004-10-26 |
| 6797599 | Gate structure and method | Mark Visokay, Antonio Rotondaro | 2004-09-28 |
| 6783997 | Gate structure and method | Antonio Rotondaro, Mark Visokay | 2004-08-31 |
| 6770521 | Method of making multiple work function gates by implanting metals with metallic alloying additives | Mark Visokay, Antonio Luis Pacheco Rotondaro | 2004-08-03 |
| 6750126 | Methods for sputter deposition of high-k dielectric films | Mark Visokay, James Joseph Chambers, Antonio Luis Pacheco Rotondaro | 2004-06-15 |
| 6709875 | Contamination control for embedded ferroelectric device fabrication processes | Stephen Roy Gilbert, Trace Hurd, Laura Wills Mirkarimi, Scott R. Summerfelt | 2004-03-23 |
| 6696332 | Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing | Mark Visokay, Antonio Luis Pacheco Rotondaro | 2004-02-24 |
| 6635498 | Method of patterning a FeRAM capacitor with a sidewall during bottom electrode etch | Scott R. Summerfelt, Guoqiang Xing, Sanjeev Aggarwal, Theodore S. Moise | 2003-10-21 |
| 6635528 | Method of planarizing a conductive plug situated under a ferroelectric capacitor | Stephen Roy Gilbert, Scott R. Summerfelt | 2003-10-21 |
| 6600183 | Integrated circuit capacitor and memory | Mark Visokay, Rajesh Khamankar, Mark A. Kressley | 2003-07-29 |
| 6576546 | Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications | Stephen Roy Gilbert, Scott R. Summerfelt | 2003-06-10 |
| 6548343 | Method of fabricating a ferroelectric memory cell | Scott R. Summerfelt, Theodore S. Moise, Guoqiang Xing, Tomoyuki Sakoda, Stephen Roy Gilbert +5 more | 2003-04-15 |
| 6544906 | Annealing of high-k dielectric materials | Antonio Luis Pacheco Rotondaro, Mark Visokay | 2003-04-08 |
| 6534809 | Hardmask designs for dry etching FeRAM capacitor stacks | Theodore S. Moise, Stephen Roy Gilbert, Scott R. Summerfelt, Guoqiang Xing | 2003-03-18 |
| 6528386 | Protection of tungsten alignment mark for FeRAM processing | Scott R. Summerfelt, Stephen Roy Gilbert, Theodore S. Moise, Sanjeev Aggarwal | 2003-03-04 |
| 6444542 | Integrated circuit and method | Theodore S. Moise, Guoqiang Xing, Mark Visokay, Justin Gaynor, Stephen Roy Gilbert +2 more | 2002-09-03 |
| 6211034 | Metal patterning with adhesive hardmask layer | Mark Visokay, Paul McIntyre, Scott R. Summerfelt | 2001-04-03 |
| 6211035 | Integrated circuit and method | Theodore S. Moise, Guoqiang Xing, Mark Visokay, Justin Gaynor, Stephen Roy Gilbert +2 more | 2001-04-03 |
| 5972722 | Adhesion promoting sacrificial etch stop layer in advanced capacitor structures | Mark Visokay, Paul McIntyre, Scott R. Summerfelt | 1999-10-26 |