Issued Patents All Time
Showing 51–75 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9153655 | Spacer elements for semiconductor device | Yun Jing Lin, Wei-Han Fan, Yu-Hsien Lin | 2015-10-06 |
| 9111906 | Method for fabricating semiconductor device having spacer elements | Yun Jing Lin, Wei-Han Fan, Yu-Hsien Lin | 2015-08-18 |
| 9048253 | Method of manufacturing strained source/drain structures | Chun-Feng Nieh, Ming-Huan Tsai, Wei-Han Fan, Chun-Fai Cheng, Han-Ting Tsai +1 more | 2015-06-02 |
| 8735988 | Semiconductor device having a first spacer element and an adjacent second spacer element | Yun Jing Lin, Wei-Han Fan, Yu-Hsien Lin | 2014-05-27 |
| 8680625 | Facet-free semiconductor device | Wei-Han Fan, Yu-Hsien Lin, Ming-Huan Tsai, Hsueh-Chang Sung, Chun-Fai Cheng | 2014-03-25 |
| 8569139 | Method of manufacturing strained source/drain structures | Chun-Feng Nieh, Ming-Huan Tsai, Wei-Han Fan, Chun-Fai Cheng, Han-Ting Tsai +1 more | 2013-10-29 |
| 8501570 | Method of manufacturing source/drain structures | Ziwei Fang, Jeff J. Xu, Ming-Jie Huang, Zhiqiang Wu, Min Cao | 2013-08-06 |
| 8455952 | Spacer elements for semiconductor device | Yun Jing Lin, Wei-Han Fan, Yu-Hsien Lin | 2013-06-04 |
| 8405160 | Multi-strained source/drain structures | Chun-Fai Cheng, Fung Ka Hing, Ming-Huan Tsai, Chun-Feng Nieh, Han-Ting Tsai +1 more | 2013-03-26 |
| 8058125 | Poly resistor on a semiconductor device | Yu-Hsien Lin, Inez Fu | 2011-11-15 |
| 7378740 | Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit | Tri-Rung Yew, Water Lur, Shih-Wei Sun | 2008-05-27 |
| 7339451 | Inductor | Chun-Tiao Liu, Stanely Chen, Roger Hsieh, Wei-Ching Chuang | 2008-03-04 |
| 6987057 | Method making bonding pad | Ellis Lee, Tri-Rung Yew | 2006-01-17 |
| 6794752 | Bonding pad structure | Ellis Lee, Tri-Rung Yew | 2004-09-21 |
| 6680248 | Method of forming dual damascene structure | Tri-Rung Yew | 2004-01-20 |
| 6617234 | Method of forming metal fuse and bonding pad | Sung-Hsiung Wang, Chiung-Sheng Hsiung | 2003-09-09 |
| 6593223 | Method of forming dual damascene structure | Tri-Rung Yew | 2003-07-15 |
| 6388326 | Bonding pad on a semiconductor chip | Hermen Liu | 2002-05-14 |
| 6372621 | Method of forming a bonding pad on a semiconductor chip | Hermen Liu | 2002-04-16 |
| 6352918 | Method of forming inter-metal interconnection | Chih-Chien Liu, Tri-Rung Yew | 2002-03-05 |
| 6339025 | Method of fabricating a copper capping layer | Chih-Chien Liu, Kun-Chih Wang, Wen-Yi Hsieh | 2002-01-15 |
| 6297561 | Semiconductor chip | Hermen Liu | 2001-10-02 |
| 6268283 | Method for forming dual damascene structure | — | 2001-07-31 |
| 6265313 | Method of manufacturing copper interconnect | Tri-Rung Yew, Water Lur | 2001-07-24 |
| 6265780 | Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit | Tri-Rung Yew, Water Lur, Shih-Wei Sun | 2001-07-24 |