Issued Patents All Time
Showing 25 most recent of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8624435 | Power regulating apparatus | Tsao-Ching Tsai | 2014-01-07 |
| 8062536 | High density plasma chemical vapor deposition process | Chih-Chien Liu, Ta-Shan Tseng, Wen-Bin Shieh, Juan-Yuan Wu, Water Lur | 2011-11-22 |
| 7718079 | High density plasma chemical vapor deposition process | Chih-Chien Liu, Ta-Shan Tseng, Wen-Bin Shieh, Juan-Yuan Wu, Water Lur | 2010-05-18 |
| 7615434 | CMOS device and fabricating method thereof | Shih-Fang Tzou, Jiunn-Hsiung Liao, Pei-Yu Chou | 2009-11-10 |
| 7514014 | High density plasma chemical vapor deposition process | Chih-Chien Liu, Ta-Shan Tseng, W.B. Shieh, J. Y. Wu, Water Lur | 2009-04-07 |
| 7378740 | Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit | Tri-Rung Yew, Yimin Huang, Water Lur | 2008-05-27 |
| 7271101 | High density plasma chemical vapor deposition process | Chih-Chien Liu, Ta-Shan Tseng, Wen-Bin Shieh, Juan-Yuan Wu, Water Lur | 2007-09-18 |
| 7078346 | High density plasma chemical vapor deposition process | Chih-Chien Liu, Ta-Shan Tseng, Wen-Bin Shieh, Juan-Yuan Wu, Water Lur | 2006-07-18 |
| 6492732 | Interconnect structure with air gap compatible with unlanded vias | Ellis Lee | 2002-12-10 |
| 6492256 | Method for forming an interconnect structure with air gap compatible with unlanded vias | Ellis Lee | 2002-12-10 |
| 6362101 | Chemical mechanical polishing methods using low pH slurry mixtures | Ming-Sheng Yang, Juan-Yuan Wu, Water Lur | 2002-03-26 |
| 6350672 | Interconnect structure with gas dielectric compatible with unlanded vias | — | 2002-02-26 |
| 6265780 | Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit | Tri-Rung Yew, Yimin Huang, Water Lur | 2001-07-24 |
| 6245380 | Method of forming bonding pad | Wen-Yi Hsieh, Water Lur, Kun-Chih Wang | 2001-06-12 |
| 6242296 | Method of fabricating embedded DRAM | — | 2001-06-05 |
| 6242346 | Metallization for uncovered contacts and vias | — | 2001-06-05 |
| 6238972 | Method for increasing capacitance | Tri-Rung Yew, Water Lur | 2001-05-29 |
| 6214671 | Method of forming dual gate structure | — | 2001-04-10 |
| 6203863 | Method of gap filling | Chih-Chien Liu, Juan-Yuan Wu, Water Lur | 2001-03-20 |
| 6200629 | Method of manufacturing multi-layer metal capacitor | — | 2001-03-13 |
| 6198617 | Multi-layer metal capacitor | — | 2001-03-06 |
| 6171895 | Fabrication of buried channel devices with shallow junction depth | Jih-Wen Chou | 2001-01-09 |
| 6153459 | Method of fabricating dual gate structure of embedded DRAM | — | 2000-11-28 |
| 6153466 | Method for increasing capacitance | Tri-Rung Yew, Water Lur | 2000-11-28 |
| 6143601 | Method of fabricating DRAM | — | 2000-11-07 |