SS

Shih-Wei Sun

UM United Microelectronics: 50 patents #57 of 4,560Top 2%
Motorola: 20 patents #329 of 12,470Top 3%
UM United Microelectrics: 1 patents #2 of 9Top 25%
🗺 Texas: #814 of 125,132 inventorsTop 1%
Overall (All Time): #25,825 of 4,157,543Top 1%
75
Patents All Time

Issued Patents All Time

Showing 26–50 of 75 patents

Patent #TitleCo-InventorsDate
6117345 High density plasma chemical vapor deposition process Chih-Chien Liu, Ta-Shan Tseng, Wen-Bin Shieh, Juan-Yuan Wu, Water Lur 2000-09-12
6114200 Method of fabricating a dynamic random access memory device Tri-Rung Yew, Water Lur 2000-09-05
6100205 Intermetal dielectric layer formation with low dielectric constant using high density plasma chemical vapor deposition process Chih-Chien Liu, J. Y. Wu, Tsang-Jung Lin, Water Lur 2000-08-08
6027996 Method of planarizing a pre-metal dielectric layer using chemical-mechanical polishing Jiunh-Yuan Wu, Water Lur 2000-02-22
6025264 Fabricating method of a barrier layer Tri-Rung Yew, Water Lur, Yimin Huang 2000-02-15
6025253 Differential poly-edge oxidation for stable SRAM cells 2000-02-15
6020258 Method for unlanded via etching using etch stop Tri-Rung Yew, Water Lur 2000-02-01
6017792 Process for fabricating a semiconductor device including a nonvolatile memory cell Umesh Sharma, John R. Yeargain 2000-01-25
6015741 Method for forming self-aligned contact window Tony Lin, Water Lur 2000-01-18
6013555 Process for rounding an intersection between an HSG-SI grain and a polysilicon layer Tri-Rung Yew, Water Lur, Chung-Shien Kao, deceased 2000-01-11
6010931 Planarization technique for DRAM cell capacitor electrode Tri-Rung Yew 2000-01-04
6008100 Metal-oxide semiconductor field effect transistor device fabrication process Wen-Kuan Yeh, Jih-Wen Chou 1999-12-28
6001738 Method of forming salicide Tony Lin, Water Lur 1999-12-14
5998251 Process and structure for embedded DRAM H. J. Wu, Jacob Chen, Tri-Rung Yew 1999-12-07
5976931 Method for increasing capacitance Tri-Rung Yew, Water Lur 1999-11-02
5968610 Multi-step high density plasma chemical vapor deposition process Chih-Chien Liu, Kuen-Jian Chen, Yu-Hao Chen, J. Y. Wu, Water Lur 1999-10-19
5960299 Method of fabricating a shallow-trench isolation structure in integrated circuit Tri-Rung Yew, Water Lur 1999-09-28
5936286 Differential poly-edge oxidation for stable SRAM cells 1999-08-10
5930618 Method of Making High-K Dielectrics for embedded DRAMS Tri-Rung Yew 1999-07-27
5920779 Differential gate oxide thickness by nitrogen implantation for mixed mode and embedded VLSI circuits Meng-Jin Tsai 1999-07-06
5899742 Manufacturing method for self-aligned local interconnects and contacts simultaneously 1999-05-04
5886375 SRAM having improved soft-error immunity 1999-03-23
5885894 Method of planarizing an inter-layer dielectric layer Jiunh-Yuan Wu, Water Lur 1999-03-23
5874353 Method of forming a self-aligned silicide device Tony Lin, Water Lur 1999-02-23
5869368 Method to increase capacitance Tri-Rung Yew, Water Lur 1999-02-09