Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8389410 | Chemical mechanical polishing method | Kun-Lin Wu | 2013-03-05 |
| 7947603 | Chemical-mechanical polishing method | Kun-Lin Wu | 2011-05-24 |
| 7335598 | Chemical-mechanical polishing method | Kun-Lin Wu | 2008-02-26 |
| 6913993 | Chemical-mechanical polishing method | Kun-Lin Wu | 2005-07-05 |
| 6403487 | Method of forming separated spacer structures in mixed-mode integrated circuits | Cheng-Han Huang, Cheng-Jung Hsu, Po-Hung Chen | 2002-06-11 |
| 6281694 | Monitor method for testing probe pins | — | 2001-08-28 |
| 6268266 | Method for forming enhanced FOX region of low voltage device in high voltage process | Ching-Chun Hwang, Fei Chen, Wei-Chung Chen | 2001-07-31 |
| 6251748 | Method of manufacturing shallow trench isolation structure | — | 2001-06-26 |
| 6232197 | Metal-insulator-metal capacitor | — | 2001-05-15 |
| 6190983 | Method for fabricating high-voltage device | — | 2001-02-20 |
| 6156640 | Damascene process with anti-reflection coating | Yimin Huang | 2000-12-05 |
| 6140156 | Fabrication method of isolation structure photodiode | — | 2000-10-31 |
| 6114220 | Method of fabricating a shallow trench isolation | — | 2000-09-05 |
| 6077784 | Chemical-mechanical polishing method | Kun-Lin Wu | 2000-06-20 |
| 6037201 | Method for manufacturing mixed-mode devices | Cheng-Han Huang | 2000-03-14 |
| 6001735 | Dual damascene technique | — | 1999-12-14 |
| 5981379 | Method of forming via | — | 1999-11-09 |
| 5981353 | Method of forming a shallow trench isolation region | — | 1999-11-09 |
| 5965464 | Manufacturing method of double spacer structure for mixed-mode IC | Cheng-Han Huang, Te-Chuan Liao, Chen-Wei Lee | 1999-10-12 |
| 5937291 | Method for forming poly-via connection between load transistor drain and driver transistor gate in SRAM | Kun-Cho Chen | 1999-08-10 |
| 5926729 | Method for forming gate oxide layers of various predefined thicknesses | Heng-Sheng Huang | 1999-07-20 |
| 5920779 | Differential gate oxide thickness by nitrogen implantation for mixed mode and embedded VLSI circuits | Shih-Wei Sun | 1999-07-06 |
| 5913132 | Method of forming a shallow trench isolation region | — | 1999-06-15 |
| 5861329 | Method of fabricating metal-oxide semiconductor (MOS) transistors with reduced level of degradation caused by hot carriers | Wen-Kuan Yeh, Coming Chen, Jih-Wen Chou | 1999-01-19 |
| 5712185 | Method for forming shallow trench isolation | Water Lur, Chin-Lai Chen | 1998-01-27 |