Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6191602 | Wafer acceptance testing method and structure of a test key used in the method | Shiang Huang-Lu, Mu-Chun Wang | 2001-02-20 |
| 6114231 | Wafer structure for securing bonding pads on integrated circuit chips and a method for fabricating the same | Jason Jenq | 2000-09-05 |
| 6110827 | Planarization method for self-aligned contact process | Sun-Chieh Chien, Der-Yuan Wu | 2000-08-29 |
| 6043545 | MOSFET device with two spacers | H. C. Tseng, Heng-Sheng Huang | 2000-03-28 |
| 6025277 | Method and structure for preventing bonding pad peel back | Jason Jenq | 2000-02-15 |
| 5937291 | Method for forming poly-via connection between load transistor drain and driver transistor gate in SRAM | Meng-Jin Tsai | 1999-08-10 |
| 5920783 | Method of fabricating a self-aligned silicide MOSFET | H. C. Tseng, Heng-Sheng Huang | 1999-07-06 |