Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8298912 | Semiconductor structure and method of manufacturing same | Wai-Kin Li, Gerald Matusiewicz | 2012-10-30 |
| 7960036 | Semiconductor structure and method of manufacturing same | Wai-Kin Li, Gerald Matusiewicz | 2011-06-14 |
| 7815173 | Cooler | — | 2010-10-19 |
| 7560222 | Si-containing polymers for nano-pattern device fabrication | Kuang-Jung Chen, Wu-Song Huang, Wai-Kin Li | 2009-07-14 |
| 7553758 | Method of fabricating interconnections of microelectronic device using dual damascene process | Wan Jae Park, Hyung-yoon Choi, Tong Qing Chen | 2009-06-30 |
| 7488687 | Methods of forming electrical interconnect structures using polymer residues to increase etching selectivity through dielectric layers | Wan Jae Park, Jae Hak Kim, Tong Qing Chen | 2009-02-10 |
| 7352064 | Multiple layer resist scheme implementing etch recipe particular to each layer | Nicholas C. M. Fuller, Timothy J. Dalton, Raymond Joy, Chun Hui Low | 2008-04-01 |
| 7311065 | Powder fuel engine | — | 2007-12-25 |
| 7091612 | Dual damascene structure and method | Kaushik A. Kumar, Timothy J. Dalton, Larry Clevenger, Andy Cowley, Douglas C. La Tulipe, Jr. +5 more | 2006-08-15 |
| 6949459 | Method of patterning damascene structure in integrated circuit design | Wai-Kin Li, Chih-Chao Yang | 2005-09-27 |
| 6750129 | Process for forming fusible links | Gwo-Shii Yang, Jen-Kon Chen, Hsueh-Chung Chen, Hans-Joachim Barth, Chiung-Sheng Hsiung +3 more | 2004-06-15 |
| 6593185 | Method of forming embedded capacitor structure applied to logic integrated circuit | Teng-Chun Tsai, Chia-Lin Hsu, Yi-Fang Cheng | 2003-07-15 |
| 6052928 | Hat ironing machine | — | 2000-04-25 |