Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6806182 | Method for eliminating via resistance shift in organic ILD | Darryl D. Restaino, Shahab Siddiqui, Erdem Kaltalioglu, Delores Bennett, Chih-Chih Liu +3 more | 2004-10-19 |
| 6750129 | Process for forming fusible links | Jen-Kon Chen, Hsueh-Chung Chen, Hans-Joachim Barth, Chiung-Sheng Hsiung, Chih-Chien Liu +3 more | 2004-06-15 |
| 6583489 | Method for forming interconnect structure with low dielectric constant | Sung-Hsiung Wang, Yi-Min Huang, Chiung-Sheng Hsiung, Hsueh-Chung Chen, Chih-Chien Liu | 2003-06-24 |
| 6559004 | Method for forming three dimensional semiconductor structure and three dimensional capacitor | Hsueh-Chung Chen, Chiung-Sheng Hsiung, Tong-Yu Chen, Sung-Hsiung Wang | 2003-05-06 |
| 6475865 | Method of fabricating semiconductor device | Tri-Rung Yew, Coming Chen, Water Lur | 2002-11-05 |
| 6316330 | Method of fabricating a shallow trench isolation semiconductor device | Tri-Rung Yew, Coming Chen, Water Lur | 2001-11-13 |
| 6306722 | Method for fabricating shallow trench isolation structure | Tri-Rung Yew, Coming Chen, Water Lur | 2001-10-23 |
| 6281143 | Method of forming borderless contact | Michael W C Huang, Hsueh-Hao Shih, Tri-Rung Yew | 2001-08-28 |
| 6254676 | Method for manufacturing metal oxide semiconductor transistor having raised source/drain | Michael W C Huang, Chien-Chao Huang, Hsien-Ta Chung, Tri-Rung Yew | 2001-07-03 |
| 6251783 | Method of manufacturing shallow trench isolation | Tri-Rung Yew, Kuo-Tai Huang, Water Lur | 2001-06-26 |
| 6249138 | Method for testing leakage current caused self-aligned silicide | Michael W C Huang, Hsiao-Ling Lu, Wen-Yi Hsieh | 2001-06-19 |
| 6248644 | Method of fabricating shallow trench isolation structure | Hsueh-Hao Shih, Chih-Chien Liu, Tri-Rung Yew | 2001-06-19 |
| 6238989 | Process of forming self-aligned silicide on source/drain region | Michael Wc Huang, James CC Huang, Wen-Yi Hsieh | 2001-05-29 |
| 6228742 | Method of fabricating shallow trench isolation structure | Tri-Rung Yew, Water Lur | 2001-05-08 |
| 6218243 | Method of fabricating a DRAM capacitor | Wayne Joon Yong Tan, Kun-Chi Lin | 2001-04-17 |
| 6200904 | Method of forming a contact hole of a DRAM | Wayne Joon Yong Tan, Kun-Chi Lin | 2001-03-13 |
| 6180492 | Method of forming a liner for shallow trench isolation | Hsueh-Hao Shih, Tri-Rung Yew, Water Lur | 2001-01-30 |
| 6146974 | Method of fabricating shallow trench isolation (STI) | Chih-Chien Liu, Cheng-Yuan Tsai, Juan-Yuan Wu | 2000-11-14 |
| 6087262 | Method for manufacturing shallow trench isolation structure | Kuo-Tai Huang, Tri-Rung Yew, Water Lur | 2000-07-11 |
| 5956598 | Method for fabricating a shallow-trench isolation structure with a rounded corner in integrated circuit | Kuo-Tai Huang, Tri-Rung Yew, Water Lur | 1999-09-21 |